ST7FLCD1 datasheet(22/95 Pages) STMICROELECTRONICS

部件名	ST7FLCD1

功能描述	8-bit MCU for LCD Monitors with 60 KBytes Flash,2 KBytes RAM, 2 DDC Ports and Infrared Controller

PDF	95 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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22 / 95 page

Reset

ST7FLCD1

22/95

Reset

The Reset procedure provides an orderly software start-up or is used to exit Low Power modes.

Three reset modes are provided:

1. Low Voltage Detector reset,

2. Watchdog or Illegal Opcode Access reset,

3. External Reset using the RESET pin.

At reset, the reset vector is fetched from addresses FFFEh and FFFFh and loaded into the PC (the

program is executed starting at this point).

Internal circuitry provides a 4096 CPU clock cycle delay as soon as the oscillator becomes active.

3.1

Low Voltage Detector and Watchdog Reset

The Low Voltage Detector generates a reset when:

● VDD is above VTRM,

● VDD is below VTRH when VDD is rising,

● VDD is below VTRL when VDD is falling (Figure 7)

Note:

Typical hysteresis (VTRH-VTRL) of 50 mV.

This circuitry is active only when VDD is higher than VTRM.

During the Low Voltage Detector reset, the RESET pin is held low, permitting the MCU to reset

other devices.

During a Watchdog reset, the RESET pin is pulled low permitting the MCU to reset other devices as

during a Low Voltage reset (Figure 8). The reset cycle is pulled low for 500 ns (typical).

Figure 7: Low Voltage Detector

RESET

VTRM

VDD

VTRH

VTRL

ST7FLCD1 数据表(PDF) 22 Page - STMicroelectronics