ST7FLCD1 datasheet(94/95 Pages) STMICROELECTRONICS

94 / 95 page

Revision History

ST7FLCD1

94/95

Revision History

Table 34: Summary of Modifications

Date

Version

Description

May 2002

2.1

Addition of Section 5.5: In-Circuit Programming (ICP) and Section 5.6: In-Application

Programming (IAP).

19 Aug 2002

2.2

Update of Chapter numbering system. Update of Figure 2: 28-pin Small Outline Package

(SO28) Pinout, Figure 12: Typical ICP Interface, Pin 14 becomes PA6/ITA/EXTRIG. Addition of

MISCR register (0001h) and update of DDC2B Control Register data. Lock-up Counter info

added in Section 12: Watchdog Timer (WDG). Buzzer output info added in Section 13: 8-bit

Timer (TIMA). Modification of oscillator frequency from 24 MHz to maximum of 27 MHz, Fast I²C

mode up to 800 kHz (for certain applications), Section 8: PWM Generator, Section 10.5:

Transfer Sequencing and Section 11.6: Transfer Sequencing. Addition of Section 17: Electrical

Characteristics and Section 19: Revision History.

24 Sept 2002

2.3

Modification of Figure 4: Program Memory Map.

14 Oct 2002

2.4

Modification of Figure 4: Program Memory Map and Table 34: Summary of Modifications.

4 Dec 2002

2.5

Modification of I²C Clock Control register.

6 Feb 2003

2.6

Change of VTRH and VTRL values in Section 17.4: AC/DC Electrical Characteristics.

11 Feb 2003

2.7

Addition of Section 1.5: External Connections. Update of DDC2B Control Register (Bit 3)

information in Section 11.7: Register Description. Change of VDD values in Section 17.4: AC/DC

Electrical Characteristics.

2 Sept 2003

2.8

Modification of values in Section 17.4: AC/DC Electrical Characteristics, Section 17.5: Power

On/Off Electrical Specifications and Section 17.6: 8-bit Analog-to-Digital Converter.

13 April 2004

2.9

Addition of VOH row in Standard I/O Port Pins on page 89. Addition of Note 1 on page 9.

9 Feb 2005

2.10

Update of Section 6.1.2: Crystal Oscillator Mode on page 32.

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