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ST7FLCD1 数据表(PDF) 36 Page - STMicroelectronics |
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ST7FLCD1 数据表(HTML) 36 Page - STMicroelectronics |
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36 / 95 page ![]() I/O Ports ST7FLCD1 36/95 7.2 Common Functional Description Each port pin of the I/O Ports can be individually configured as either an input or an output, under software control. Each bit of Data Direction Register (DDR) corresponds to an I/O pin of the associated port. This corresponding bit must be set to configure its associated pin as an output and must be cleared to configure its associated pin as an input (see Note1onpage35). The Data Direction Registers can be read and written. A typical I/O circuit is shown in Figure 16. Any write to an I/O port updates the port data register even when configured as an input. Any read of an I/O port returns either the data latched in the port data register (pins configured as output) or the value of the I/O pins (pins configured as an input). Remark: When there is no I/O pin inside an I/O port, the returned value is logic 0 (pin configured as an input). At reset, all DDR registers are cleared, configuring all I/O ports as inputs. Data Registers (DR) are also cleared at reset. Input mode When DDR = 0, the corresponding I/O is configured in Input mode. In this case, the output buffer is switched off and the state of the I/O is readable through the Data Register address, coming directly from the TTL Schmitt Trigger output and not from the Data Register output. Output mode When DDR = 1, the corresponding I/O is configured in Output mode. In this case, the output buffer is activated according to the Data Register content. A read operation is directly performed from the Data Register output. Analog input Each I/O can be used as an analog input by adding an analog switch driven by the ADC. The I/O must be configured as an input before using it as analog input. When the analog channel is selected by the ADC, the analog value is directly driven to the ADC through an analog switch. Alternate mode A signal coming from an on-chip peripheral is output on the I/O which is then automatically configured in output mode. The signal coming from the peripheral enables the alternate signal to be output. A signal coming from an I/O can be input to an on-chip peripheral. Table 10: I/O Pin Function DDR Mode 0 Input 1 Output |
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