ST7FOXK2 datasheet(54/226 Pages) STMICROELECTRONICS

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Interrupts

ST7FOXF1, ST7FOXK1, ST7FOXK2

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Maskable sources

Maskable interrupt vector sources can be serviced if the corresponding interrupt is enabled

and if its own interrupt software priority (in ISPRx registers) is higher than the one currently

being serviced (I1 and I0 in CC register). If any of these two conditions is false, the interrupt

is latched and thus remains pending.

●

External interrupts

External interrupts allow the processor to exit from Halt low power mode.

External interrupt sensitivity is software selectable through the External Interrupt

Control register (EICR).

External interrupt triggered on edge will be latched and the interrupt request

automatically cleared upon entering the interrupt service routine.

If several input pins of a group connected to the same interrupt line are selected

simultaneously, these will be logically ORed.

●

Peripheral interrupts

Usually the peripheral interrupts cause the MCU to exit from Halt mode except those

mentioned in Table 17: ST7FOXF1/ST7FOXK1 Interrupt mapping.

A peripheral interrupt occurs when a specific flag is set in the peripheral status

registers and if the corresponding enable bit is set in the peripheral control register.

The general sequence for clearing an interrupt is based on an access to the status

Note:

The clearing sequence resets the internal latch. A pending interrupt (that is, waiting for

being serviced) will therefore be lost if the clear sequence is executed.

7.3

Interrupts and low power modes

All interrupts allow the processor to exit the Wait low power mode. On the contrary, only

external and other specified interrupts allow the processor to exit from the Halt modes (see

column “Exit from Halt” in Table 17: ST7FOXF1/ST7FOXK1 Interrupt mapping). When

several pending interrupts are present while exiting Halt mode, the first one serviced can

only be an interrupt with exit from Halt mode capability and it is selected through the same

decision process shown in Figure 19.

Note:

If an interrupt, that is not able to Exit from Halt mode, is pending with the highest priority

when exiting Halt mode, this interrupt is serviced after the first one serviced.

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