ST7FOXK2 datasheet(19/226 Pages) STMICROELECTRONICS

19 / 226 page

ST7FOXF1, ST7FOXK1, ST7FOXK2

Pin description

19/226

Table 3.

Device pin description (20-pin package)

Number

Pin Name

Level

Port / Control

Main

function

(after reset)

Alternate

function

Input

Output (1)

PC6

I/O

ei2

Port C6

PA1 (HS)/ATIC

I/O

ei0

Port A1 (HS)

ATIC

PA2 (HS)/ATPWM0

I/O

Port A2 (HS)

ATPWM0

PA3 (HS)/ATPWM1

I/O

Port A3 (HS)

ATPWM1

PA4

(HS)ATPWM2/MCO

I/O

Port A4 (HS)

ATPWM2/MCO

PA5 (HS)ATPWM3

I/O

Port A5 (HS)

ATPWM3

PA6 (HS)/I2CDATA

I/O

Port A6 (HS)

I2CDATA

PA7 (HS)/ I2CCLK

I/O

Port A7 (HS)

I2CCLK

RESET

Reset

VSS

(3)

Digital Ground Voltage

VDD

(2)

Digital Supply Voltage

PB0/AIN0

I/O

ei1

Port B0

AIN0

PB1/AIN1/CLKIN

I/O

Port B1

AIN1/External

clock source

PB2/AIN2

I/O

Port B2

AIN2

PB3/AIN3

I/O

Port B3

AIN3

PB4/AIN4

I/O

Port B4

AIN4

PB5/AIN5

I/O

Port B5

AIN5

PC2/ICCDATA

I/O

ei2

Port C2

ICCDATA

PC3/ICCCLK

I/O

Port C3

ICCCLK

PC4/LTIC

I/O

ei2

Port C4

LTIC

In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to VDD not implemented).

It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground.

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