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ST7FOXK2 数据表(PDF) 38 Page - STMicroelectronics |
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ST7FOXK2 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 226 page ![]() Supply, reset and clock management ST7FOXF1, ST7FOXK1, ST7FOXK2 38/226 Figure 12. Clock management block diagram 6.2 Multi-oscillator (MO) The main clock of the ST7 can be generated by four different source types coming from the multi-oscillator block (1 to 16 MHz): ● An external source ● 5 different configurations for crystal or ceramic resonator oscillators ● An internal high frequency RC oscillator Each oscillator is optimized for a given frequency range in terms of consumption and is selectable through the option byte. The associated hardware configurations are shown in Table 8. Refer to the electrical characteristics section for more details. CR6 CR9 CR2 CR3 CR4 CR5 CR8 CR7 fOSC MCCSR SMS MCO MCO fCPU fCPU TO CPU AND PERIPHERALS (1ms timebase @ 8 MHz fOSC) /32 DIVIDER fOSC fOSC/32 fOSC fLTIMER 1 0 LITE TIMER 2 COUNTER 8-BIT AT TIMER 2 12-BIT CLKIN OSC2 CLKIN Tunable Oscillator RC /2 DIVIDER Option bits CLKSEL[1:0] OSC 1-16 MHz CLKIN CLKIN /OSC1 OSC /2 DIVIDER OSC/2 CLKIN/2 CLKIN/2 Option bits CLKSEL[1:0] CR1 CR0 or 32kHz CKCNTCSR RC/AWU Clock controller fCPU AWU RC OSC 8 MHz 2 MHz 1 MHz 4 MHz Prescaler 8 MHz (fRC) RC OSC 500 kHz CK2 CK1 CK0 PSCR RCCRH RCCRL |
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