RZSLASHG2UL datasheet(3/67 Pages) RENESAS

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RZ/G2UL Group

1. Overview

R01DS0486EJ0110 Rev.1.10

Page 3 of 67

Jun 16, 2025

1.1.2

CPU Peripheral

Item

Description

Clock Pulse Generator

(CPG)

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● Generates the clocks from external clock (EXCLK 24 MHz).

Maximum Arm Cortex-A55 clock: 1.0 GHz

Maximum Arm Cortex-M33 clock: 200 MHz

Maximum DDR clock: 666 MHz (DDR3L-1333), 800 MHz (DDR4-1600)

Maximum AXI-bus clock: 200 MHz

Maximum APB-bus clock: 100 MHz

● SSC (Spread Spectrum Clock) supported

Direct Memory Access Controller

(DMAC)

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● 2 modules, 16 channels per module

● Transfer request: On-chip peripheral request / auto request (software trigger)

● A specific DMA transfer interval can be specified to adjust the bus occupancy.

● LINK mode (DMA transfer under descriptor control) supported

● Transfer information can be automatically reloaded

Interrupt Controller

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● Arm® CoreLink™ Generic Interrupt Controller (GIC-600) for Arm Cortex-A55

● Nested Vectored Interrupt Controller (NVIC) for Arm Cortex-M33

● External Interrupt pins (NMI, IRQ7 to IRQ0, TINT31-0)

● On-chip peripheral Interrupts: Priority level set for each module

Message Handling Unit

(MHU)

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● Message handling function between Arm Cortex-A55 and Arm Cortex-M33

● Assert interrupt to inform message and response from/to Arm Cortex-A55, Cortex-M33

General-purpose I/O

(GPIO)

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● General-purpose I/O ports

Thermal Sensor Unit

(TSU)

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● 1 channel

1.1.3

Internal Memory

Item

Description

On-chip RAM

[RZ/G2UL (Type-1) RZ/G2UL (Type-2)]

● RAM of 128 Kbytes (ECC)

RZ/G2UL 数据表(PDF) 3 Page - Renesas Technology Corp

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