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RZ/G2UL 数据表(PDF) 28 Page - Renesas Technology Corp |
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RZ/G2UL 数据表(HTML) 28 Page - Renesas Technology Corp |
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28 / 67 page ![]() RZ/G2UL Group 3. Electrical Characteristics R01DS0486EJ0110 Rev.1.10 Page 28 of 67 Jun 16, 2025 Internal clock Powersupply*1 MD_BOOT0 to 2, DEBUGEN, MD_CLKS, MD_OSCDRV0,1 Oscillation stabilized state tMDH PRST# tOSC tMDS Note 1. VDD, PLLn_DVDD11, PLLn_AVDD18, ADC_AVDD18, VDD18, OTP_VDD18, USB_VDD18, CSI_VDD18, PVDD,USB_VDD33, DDR_VDDQ, SPI_PVDD, SDn_PVDD, PVDD182533_0, PVDD182533_1, OTP_VDD18 Figure 3.6 Power-On Oscillation Settling Time Internal clock RES# MD_BOOT0 to 2, DEBUGEN, MD_CLKS, MD_OSCDRV0,1 Oscillation stabilized state tROSC + tPOSC tMDS Standby period tMDS Note: Oscillation setting time when the internal oscillator is used. Figure 3.7 Oscillation Settling Time on Return from Standby (Return by Reset) |
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