EM78P468NBQSSLASHNBQJ datasheet(31/82 Pages) EMC

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EM78P468N/L

8-Bit Microcontroller

Product Specification (V1.6) 12.31.2007

• 25

(This specification is subject to change without further notice)

6.4 I/O Ports

The I/O registers, (Port 5, Port 6, Port 7 and Port 8), are bi-directional tri-state I/O ports.

Port 6 and Port 8 are pulled-high internally by software; Port 6 is also pulled-low internally

by software. Furthermore, Port 6 has its open-drain output also through software. Port 6

and Port 8 features an input status changed interrupt (or wake-up) function and is

pulled-high by software. Each I/O pin can be defined as "input" or "output" pin by the I/O

control register (IOC50 ~ IOC80). The I/O registers and I/O control registers are both

readable and writable. The I/O interface circuits are shown in Fig. 6-5.

Note: Open-drain, pull-high, and pull down are not shown in the figure.

Fig. 6-5 The Circuit of I/O Port and I/O Control Register for Port 5 ~ 8

6.5 Reset and Wake-up

A reset can be activated by

POR (Power-on Reset)

WDT timeout. (if enabled)

/RESET pin goes to low

Note: The reset circuit is always enabled. It will reset the CPU at 1.9V.

Once a reset occurs, the following functions are performed

The oscillator is running, or will be started

The program counter (R2/PC) is set to all "0"

All I/O port pins are configured as input mode (high-impedance state)

The TCC/Watchdog timer and prescaler are cleared

When power is on, the Bits 5 and 6 of R3 and the upper two bits of R4 are cleared.

Bits of the IOC71 register are set to all "1" except for Bit 6 (INT flag)

For other registers, see Table 2

EM78P468NBQS/NBQJ 数据表(PDF) 31 Page - ELAN Microelectronics Corp