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EM78P468NBQS/NBQJ 数据表(PDF) 42 Page - ELAN Microelectronics Corp |
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EM78P468NBQS/NBQJ 数据表(HTML) 42 Page - ELAN Microelectronics Corp |
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42 / 82 page ![]() EM78P468N/L 8-Bit Microcontroller 36 • Product Specification (V1.6) 12.31.2007 (This specification is subject to change without further notice) When the LCD function is disabled, all common/segment output is set to ground (GND) level Bit 3: Not used Bit 2 (LCDTYPE): LCD drive waveform type select bit LCDTYPE = “0”: “ A” type waveform LCDTYPE = “1”: “ B” type waveform Bits 1 ~ 0 (LCDF1 ~ LCDF0): LCD frame frequency control bits LCD Frame Frequency (e.g. Fs=32.768kHz) LCDF1 LCDF0 1/2 Duty 1/3 Duty 1/4 Duty 0 0 Fs/(256 ×2)=64.0 Fs/(172 ×3)=63.5 Fs/(128 ×4)=64.0 0 1 Fs/(280 ×2)=58.5 Fs/(188 ×3)=58.0 Fs/(140 ×4)=58.5 1 0 Fs/(304 ×2)=53.9 Fs/(204 ×3)=53.5 Fs/(152 ×4)=53.9 1 1 Fs/(232 ×2)=70.6 Fs/(156 ×3)=70.0 Fs/(116 ×4)=70.6 Note: Fs: sub-oscillator frequency 6.9.2 RA/LCD_ADDR (LCD Address) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 LCD_A4 LCD_A3 LCD_A2 LCD_A1 LCD_A0 Bits 7 ~ 5: Not used, fixed to “0” Bits 4 ~ 0 (LCDA4 ~ LCDA0): LCD RAM address RB (LCD Data Buffer) RA (LCD Address) Bits 7 ~4 Bit 3 (LCD_D3) Bit 2 (LCD_D2) Bit 1 (LCD_D1) Bit 0 (LCD_D0) Segmen t 00H − − − − − SEG0 01H − − − − − SEG1 02H − − − − − SEG2 | | | 1DH − − − − − SEG29 1EH − − − − − SEG30 1FH − − − − − SEG31 Common X COM3 COM2 COM1 COM0 6.9.3 RB/LCD_DB (LCD Data Buffer) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 − − − − LCD_D 3 LCD_D 2 LCD_D 1 LCD_D 0 Bits 7 ~ 4: Not used Bit 3 ~ 0 (LCD_D3 ~ LCD_D0): LCD RAM data transfer registers |
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