EM78P468NBQSSLASHNBQJ datasheet(41/82 Pages) EMC

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EM78P468N/L

8-Bit Microcontroller

Product Specification (V1.6) 12.31.2007

• 35

(This specification is subject to change without further notice)

Table 3 Interrupt Vector

Interrupt Vector

Interrupt Status

0003H

TCC overflow interrupt.

0006H

External interrupt P5.4/INT0 pin

0009H

External interrupt P5.5/INT1 pin

000CH

Counter 1 underflow interrupt

000FH

Counter 2 underflow interrupt

0012H

High-pulse width timer underflow interrupt

0015H

Low-pulse width timer underflow interrupt

0018H

Port 6, Port 8 input status change wake up

6.9 LCD Driver

This LSI can drive an LCD of up to 32 segments and 4 commons that can drive a total

of 4

×32 dots. The LCD block is made up of an LCD driver, display RAM, segment

output pins, common output pins, and LCD operating power supply pins. This circuit

works on normal mode, green mode and idle mode. The LCD duty; bias; the number of

segment; the number of common and frame frequency are determined by the LCD

controller register.

The basic structure contains a timing control that uses a subsystem clock to generate

the proper timing for different duty and display accesses. The R9 register is a

command register for the LCD driver which includes LCD enable/disable, bias (1/2 and

1/3), duty (1/2, 1/3, 1/4), and LCD frame frequency control. The register RA is an LCD

contrast and LCD RAM address control register. The register RB is an LCD RAM data

buffer. LCD booster circuit can change the operation frequency to improve VLCD2 and

VLCD3 drive capability. The control register is described as follows.

6.9.1 R9/LCDCR (LCD Control Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DS1

DS0

LCDEN

−

LCDTYPE

LCDF1

LCDF0

Bit 7 (BS):

LCD bias select bit, 0/1=> (1/2 bias) / (1/3 bias)

Bits 6 ~ 5 (DS1 ~ DS0):

LCD duty select

DS1

DS0

LCD Duty

1/2 duty

1/3 duty

1/4 duty

Bit 4 (LCDEN):

LCD enable bit

“0”:

disable the LCD circuit

“1”:

enable the LCD circuit

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