ST63142 datasheet(22/86 Pages) STMICROELECTRONICS

22 / 86 page

Interrupt Procedure. The interrupt procedure is

very similar to a call procedure, indeed the user

can consider the interrupt as an asynchronous call

procedure. As this is an asynchronous event the

user does not know about the context and the time

at which it occurred. As a result the user should

save all the data space registers which will be used

inside the interrupt routines. There are separate

sets of processor flags for normal, interrupt and

non-maskable interrupt modes which are automat-

ically switched and so these do not need to be

saved.

The following list summarizes the interrupt proce-

dure:

ST631xx actions

- Interrupt detection

- The flags C and Z of the main routine are ex-

changed with the flags C and Z of the interrupt

routine (or the NMI flags)

- The value of the PC is stored in the first level of

the stack

- The normal interrupt lines are inhibited (NMI

still active)

- First internal latch is cleared

- The related interrupt vector is loaded in the PC.

User actions

- User selected registers are saved inside the in-

terrupt service routine (normally on a software

stack)

- The source of the interrupt is found by polling

(if more than one source is associated to the

same vector) the interrupt flag of the source.

- Interrupt servicing

- Return from interrupt (RETI)

ST631xx actions

- Automatically the ST631xx core switches back

to the normal flags (or the interrupt flags) and

pops the previous PC value from the stack

The interrupt routine begins usually by the identifi-

cation of the device that has generated the inter-

rupt request (by polling). The user should save the

registers which are used inside the interrupt rou-

tine (that holds relevant data) into a software stack.

After the RETI instruction execution, the core car-

ries out the previous actions and the main routine

can continue.

ST631xx Interrupt Details

IR Interrupt (#0). The IRIN Interrupt is connected

to the first interrupt #0 (NMI, 0FFCh). If enabled,

then an interrupt will be generated on a rising edge

at the pin.

Interrupt (#1). On ST631xx no sources are associ-

ated to vector (#1). To avoid any ghost interrupt

due to interrupt (#1) the user must keep the EL1

bit of IOR register to zero.

INTERRUPT (Continued)

LOAD PC FROM

INTERRUPT VECTOR

( FF C / FFD )

SET

INTE RRUPT MAS K

PUSH THE

PC INTO THE STAC K

SEL ECT

INTERNAL MODE FL AG

CHECK IF THERE IS

AN INTERRUPT REQUES T

AND INTE RRUPT MASK

INSTRUCTION

WA S

THE INST RUCTION

ARETI

IS THE CORE

ALREADY IN

NORMAL MODE ?

FE TCH

INST RUCTION

EX ECUTE

INST RUCTION

CLEA R

INTERRUPT MAS K

SELECT

PROGRAM FLA GS

” POP ”

THE STACK ED PC

YES

YE S

YES

VA000014

Figure 19. Interrupt Processing Flow-Chart

ST63140,142,126,156

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