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ST63142 数据表(PDF) 40 Page - STMicroelectronics |
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ST63142 数据表(HTML) 40 Page - STMicroelectronics |
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40 / 86 page ![]() Figure 42. S-BUS Timing Diagram SERIAL PERIPHERAL INTERFACE (Continued) S-BUS/I 2CBUS Timing Diagrams The clock of the S-BUS/I 2CBUS of the ST631xx SPI (single master only) has a fixed bus clock fre- quency of 62.5kHz. All the devices connected to the bus must be able to follow transfers with frequencies up to 62.5kHz, either by being able to transmit or receive at that speed or by applying the clock synchronization procedure which will force the master into a wait state and stretch low peri- ods. ® ST63140,142,126,156 36/82 |
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