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ST63142 数据表(PDF) 28 Page - STMicroelectronics

部件名 ST63142
功能描述  8-BIT HCMOS MCUs FOR TV FREQUENCY & VOLTAGE SYNTHESIS WITH OSD
PDF  86 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST63142 数据表(HTML) 28 Page - STMicroelectronics

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INPUT/OUTPUT PORTS
The ST631xx microcontrollers use three standard
I/O ports (A,B,C) with up to eight pins on each port;
refer to the device pin configurations to see which
pins are available.
Each line can be individually programmed either in
the input mode or the output mode as follows by
software.
- Output
- Input with on-chip pull-up resistor (selected by
software)
- Input without on-chip pull-up resistor (selected
by software)
Note: pins with 12V open-drain capability do not
have pull-up resistors.
In output mode the following hardware configura-
tions are available:
- Open-drain output 12V (PA0-PA7)
- Open-drain output 5V (PB5-PB7, PC3, PC5-
PC7)
- Push-pull output (PB0-PB4, PC0-PC2, PC4)
The lines are organized in three ports (port A,B,C).
The ports occupy 6 registers in the data space.
Each bit of these registers is associated with a par-
ticular line (for instance, the bits 0 of the Port A
Data and Direction registers are associated with
the PA0 line of Port A).
There are three Data registers (DRA, DRB, DRC),
that are used to read the voltage level values of the
lines programmed in the input mode, or to write the
logic value of the signal to be output on the lines
configured in the output mode. The port Data Reg-
isters can be read to get the effective logic levels of
the pins, but they can be also written by the user
software, in conjunction with the related Data Di-
rection Register, to select the different input mode
options. Single-bit operations on I/O registers (bit
set/reset instructions) are possible but care is nec-
essary because reading in input mode is made
from I/O pins and therefore might be influenced by
the external load, while writing will directly affect
the Port data register causing an undesired
changes of the input configuration. The three Data
Direction registers (DDRA, DDRB, DDRC) allow
the selection of the direction of each pin (input or
output).
All the I/O registers can be read or written as any
other RAM location of the data space. During the
initialization of the MCU, all the I/O registers are
cleared and the input mode with pull-up is selected
on all the pins thus avoiding pin conflicts (with the
exception of PC2 which is set in output mode and
is set low).
Details of I/O Ports
When programmed as an input a pull-up resistor (if
available) can be switched active under program
control. When programmed as an output the I/O
port will operate either in the push-pull mode or the
open-drain mode according to the hardware fixed
configuration as specified below.
Port A. PA0-PA7 are available as an open-drain
only (no push-pull programmability and no resis-
tive pull-up in input mode) capable of withstanding
12V while the normal open drain has standard rat-
ings of VDD + 0.3V. This I/O port has been specially
designed for direct LED driving and is able to sink
up to 30mA with a maximum VOL of 1V.
Some Port B and C lines are also used as I/O buff-
ers for signals coming from the on-chip SPI and
OSD.
In this case the final signal on the output pin is
equivalent to a wired AND with the programmed
data output.
If the user needs to use the SPI or the OSD, then
the I/O line should be set in output mode while the
open-drain configuration is fixed in hardware ; the
corresponding data bit must be set to one.
PB2 and PB3 must be programmed in input mode
to provide the HSYNC and VSYNC input signals to
the OSD.
On ST631xx the I/O pins with double or special
functions are:
- PB2/VSYNC (connected to the OSD VSYNC
signal)
- PB3/HSYNC (connected to the OSD HSYNC
signal)
- PB5/SCL (connected to the SPI clock signal)
- PB6/SDA (connected to the SPI data signal)
- PB7/SEN (connected to the SPI enable signal)
- PC2-ON-OFF, this I/O is specially suited to TV
SET ON-OFF and for this reason at reset the
related Data Direction bit will be automatically
set to one (I/O line is in output mode), while the
rest of the port is in input mode
- PC3/BLANK (connected to the OSD Blank sig-
nal)
- PC5/R, PC6/G, PC7/B (connected to the OSD
R-G-B signals)
All the Port A,B and C I/O lines have Schmitt-trig-
ger input configuration with a typical hysteresis of
1V.
®
ST63140,142,126,156
24/82



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