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ST72141K2 数据表(PDF) 45 Page - STMicroelectronics

部件名 ST72141K2
功能描述  8-BIT MCU WITH ELECTRIC-MOTOR CONTROL, ADC, 16-BIT TIMERS, SPI INTERFACE
PDF  132 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST72141K2 数据表(HTML) 45 Page - STMicroelectronics

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MOTOR CONTROLLER (Cont’d)
Input Pins
The MCIA, MCIB and MCIC input pins can be
used as analog pins in Sensorless mode or as dig-
ital pins in Sensor mode. In sensorless mode, the
analog inputs are used to measure the BEMF zero
crossing and to detect the end of demagnetization
if required. In Sensor mode, they are connected to
sensor outputs.
Due to the presence of diodes, these pins can per-
manently support an input current of 5 mA. In Sen-
sorless mode, this feature enables the inputs to be
connected to each motor phase through a single
resistor.
Note: In high voltage applications, in Sensorless
mode and for certain motors and power topologies
(with parasitic capacitance or other), it may be re-
quired to add external pull-up Schottky 0.4 V (e.g.
BAT48) diodes on the MCIA, MCIB and MCIC
pins.
A multiplexer, programmed by the IS[1:0] bits in
MPHST register selects the input pins and con-
nects them to the rotor position control logic in ei-
ther Sensorless or Sensor mode.
Figure 29. Input Stage
VREF
Inputn Sel Reg
VR[1:0]
MCIC
MCIA
MCIB
A
B
C
IS[1:0]
C
P
00
01
10
+
-
External Input Block
Input Comparator Block
Event Detection
DQ
CP
ZVD bit
HDMn bit*
Z
DH
SR bit
or
or
or
or
1
2
20
µs / D
20
µs / C
CPBn bit*
REO bit
C
DS,H
CPBn bit*
V
I
16-bit Timer PWM
Sampling frequency
V0C1 bit
Freq (T=1.25
µs) for demagnetization and sensors
Sample
Sample
C
DS,H
* = Preload register,
MPHST Register
MPAR Register
MCRA Register
MCRB Register MPAR Register
MCRB Register
MCRA Register
MCRB Register
Reg
C
DS,H
Z
events:
Commutation
BEFM Zero-crossing
End Of Demagnetization
E
Emergency Stop
Notes:
Updated/Shifted on R
Ratio Updated (+1 or -1)
Multiplier Overflow
R+/-
O
Current Mode
Voltage Mode
I
V
Regn
Updated with Regn+1 on C
1
2
Branch taken after C event
Branch taken after D event
changes taken into
account at next C event.



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