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ST92141 数据表(PDF) 64 Page - STMicroelectronics |
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ST92141 数据表(HTML) 64 Page - STMicroelectronics |
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64 / 179 page  64/179 ST92141 - RESET AND CLOCK CONTROL UNIT (RCCU) Figure 27. ST92141 Clock Distribution Diagram (settings given for 5MHz crystal & 25MHz lnternal clock) 5 MHz PLL 1/16 x 1/2 DIV2=1 1 Oscillator MX1=0 MX0=0 CSU_CKSEL=1 10 XT_DIV16=1 01 0 1 0 1 RCCU 25 MHz INTCLK CLOCK2 3-bit Prescaler CPU IMC 1/4 WDG CPUCLK EMBEDDED MEMORY RAM EPROM/FASTROM STIM 1...8 A/D 1...256 P5.7 Quartz DX2=0 DX1=0 DX0=0 01 1/16 CK_AF pin 1 0 WFI and LPOWFI=1 and WFI_CKSEL = 1 CK_AF and WFI_CKSEL=1 or CKAF_SEL=1 and LPOWFI=1 WFI 1/4 Conversion time N X 138 X INTCLK 1...8 Baud Rate Generator 1/N N=2,4,16,32 SCK Master SCK Slave (Max INTCLK/2) SPI LOGIC 1/2 EFT 1/N EXTCLKx (Max INTCLK/4) N=2,4,8 1/2 1...256 /OTP N=1,4,6,8,10,12,14,16 1/N 1 |
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