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ST92141 数据表(PDF) 76 Page - STMicroelectronics |
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ST92141 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 179 page  76/179 ST92141 - RESET AND CLOCK CONTROL UNIT (RCCU) 5.7 STOP MODE Under control of the Wake-up Interrupt Manage- ment Unit (WUIMU), the Reset/Stop Manager can also stop all oscillators without resetting the de- vice. In Stop Mode all context information will be pre- served. During this condition the internal clock will be frozen in the high state. Stop Mode is entered by programming the WUIMU registers (See “WAKE-UP / INTERRUPT LINES MANAGEMENT UNIT (WUIMU)” on page 55.). An active transition on an External Wake Up line, exits the chip from Stop Mode and the MCU resumes execution after a delay of between 10239 CLOCK2 periods and 10239 CLOCK2 periods plus the Oscillator Start Up Time. On exiting from Stop mode an interrupt is generat- ed and the EX_STP bit in CLK_FLAG will be set, to indicate to the user program that the machine is exiting from Stop mode. Table 18. Internal Registers Reset Values Register Number System Register Reset Value Page 0 Register Reset Value F (SSPLR) undefined Reserved E (SSPHR) undefined (SPICR) 00h D (USPLR) undefined (SPIDR) undefined C (USPHR) undefined (WCR) 7Fh B (MODER) E0h (WDTCR) 12h A (Page Ptr) undefined (WDTPR) undefined 9 (Reg Ptr 1) undefined (WDTLR) undefined 8 (Reg Ptr 0) undefined (WDTHR) undefined 7 (FLAGR) undefined (NICR) 00h 6 (CICR) 87h (EIVR) x2h 5 (PORT5) FFh (EIPLR) FFh 4 (PORT4) FFh (EIMR) 00h 3 (PORT3) FFh (EIPR) 00h 2 (PORT2) FFh (EITR) 00h 1 (PORT1) FFh Reserved 0 (PORT0) FFh Reserved 1 |
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