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ST92141 数据表(PDF) 14 Page - STMicroelectronics |
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ST92141 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 179 page  14/179 ST92141 - GENERAL DESCRIPTION 1.3 MEMORY MAP 1.3.1 Memory Configuration The Program memory space of the ST92141, 16K bytes of directly addressable on-chip memory, is fully available to the user. The first 256 memory locations from address 0 to FFh hold the Reset Vector, the Top-Level (Pseudo Non-Maskable) interrupt, the Divide by Zero Trap Routine vector and, optionally, the interrupt vector table for use with the on-chip peripherals and the external interrupt sources. Apart from this case no other part of the Program memory has a predeter- mined function except segment 21h which is re- served for use by STMicroelectronics. 1.3.2 EPROM Programming The 16K bytes of EPROM memory of the ST92E141 may be programmed by using the EPROM Programming Boards (EPB) or gang pro- grammers available from STMicroelectronics. EPROM Erasing The EPROM of the windowed package of the ST92E141 may be erased by exposure to Ultra-Vi- olet light. The erasure characteristic of the ST92E141 is such that erasure begins when the memory is ex- posed to light with a wave lengths shorter than ap- proximately 4000Å. It should be noted that sunlight and some types of fluorescent lamps have wave- lengths in the range 3000-4000Å. It is thus recom- mended that the window of the ST92E141 packag- es be covered by an opaque label to prevent unin- tentional erasure problems when testing the appli- cation in such an environment. The recommended erasure procedure of the EPROM is the exposure to short wave ultraviolet light which have a wave-length 2537Å. The inte- grated dose (i.e. U.V. intensity x exposure time) for erasure should be a minimum of 15W-sec/cm2. The erasure time with this dosage is approximate- ly 30 minutes using an ultraviolet lamp with 12000mW/cm2 power rating. The ST92E141 should be placed within 2.5cm (1 inch) of the lamp tubes during erasure. Table 5. First 6 Bytes of Program Space Figure 2. Memory Map 0 Address high of Power on Reset routine 1 Address low of Power on Reset routine 2 Address high of Divide by zero trap Subroutine 3 Address low of Divide by zero trap Subroutine 4 Address high of Top Level Interrupt routine 5 Address low of Top Level Interrupt routine SEGMENT 0 64 Kbytes 00FFFFh 00C000h 00BFFFh 008000h 007FFFh 004000h 000000h 003FFFh PAGE 0 - 16 Kbytes PAGE 1 - 16 Kbytes PAGE 2 - 16 Kbytes PAGE 3 - 16 Kbytes SEGMENT 20h 64 Kbytes 200000h 21FFFFh 20C000h 20BFFFh 208000h 207FFFh 204000h 203FFFh PAGE 80 - 16 Kbytes PAGE 81 - 16 Kbytes PAGE 82 - 16 Kbytes PAGE 83 - 16 Kbytes 200000h 200200h RAM 512 bytes Internal Reserved SEGMENT 21h 64 Kbytes 20FFFFh 220000h 210000h Internal ROM Reserved Reserved Reserved max. 64 Kbytes 000000h 004000h FASTROM/EPROM 16 Kbytes 003FFFh 9 |
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