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ST92141 数据表(PDF) 160 Page - STMicroelectronics |
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ST92141 数据表(HTML) 160 Page - STMicroelectronics |
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160 / 179 page  160/179 ST92141 - ELECTRICAL CHARACTERISTICS EXTERNAL INTERRUPT TIMING TABLE (VDD = 5V ± 10%, TA = –40°C to +85°C, CLoad = 50pF, fINTCLK = 25MHz, unless otherwise specified) Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period. The value in the right hand two columns show the timing minimum and maximum for an internal clock at 25MHz (INTCLK). Measurement points are taken with reference to VIH-VIH for positive pulse and VIL-VIL for negative pulse (1) Formula guaranteed by design. Legend: Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2; 2 x OSCIN period when OSCIN is divided by 2; OSCIN period x PLL factor when the PLL is enabled. EXTERNAL INTERRUPT TIMING N° Symbol Parameter Value (Note) Unit Formula(1) Min Max 1 TwINTLR Low Level Pulse Width in Rising Edge Mode ≥ Tck+10 50 ns 2 TwINTHR High Level Pulse Width in Rising Edge Mode ≥ Tck+10 50 ns 3 TwINTHF High Level Pulse Width in Falling Edge Mode ≥ Tck+10 50 ns 4 TwINTLF Low Level Pulse Width in Falling Edge Mode ≥ Tck+10 50 ns n=0,6 1 |
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