ST92141 datasheet(170/179 Pages) STMICROELECTRONICS

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ST92141 - ELECTRICAL CHARACTERISTICS

A/D EXTERNAL TRIGGER TIMING TABLE

(VDD = 5V ± 10%, TA = –40°C to +85°C, CLoad = 50pF, fINTCLK = 25MHz, unless otherwise specified)

Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,

standard timer prescaler and counter programmed values.

The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 25MHz.

Measurement points are taken with reference to VIH-VIH for positive pulse and VIL-VIL for negative pulse

(1) Formula guaranteed by design.

Legend:

Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;

2*OSCIN period when OSCIN is divided by 2;

OSCIN period / PLL factor when the PLL is enabled.

n = number of autoscanned channels (1

≤ n ≤ 8)

FDF = Frequency Division Factor (ADC prescaler factor), refer to section 7.6.1 on page 147

A/D EXTERNAL TRIGGER TIMING

N°

Symbol

Parameter

Value (Note)

Unit

Formula(1)

Min.

Max.

1TwLOW

External trigger pulse width

≥ 1.5 x Tck

2TwHIGH

External trigger pulse distance

≥ 1.5 x Tck

3TwEXT

External trigger active edges distance

≥ 138 x n x FDF x Tck n x FDF x 5.52

µs

4TdSTR

EXTRG falling edge and first conversion start

0.5 x Tck

1.5 x Tck

ST92141 数据表(PDF) 170 Page - STMicroelectronics

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