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STLC5046 数据表(PDF) 15 Page - STMicroelectronics |
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STLC5046 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 27 page  ter) the 16 bits will be carried out as follows: the 8 most significative bits in the programmed time slot, the 8 least significative bits in the following timeslot. Example: if T26..T20=00: TS0 TS1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Pin strap value (value=80h) 100 00 00 0 Referred to FS2. Transmit Time Slot channel #3 (DXA3) Addr=16h; Reset Value=00h Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 EN3 T36 T35 T34 T33 T32 T31 T30 EN3=0: Selected transmit time slot on DX output is in H.I. EN3=1: Selected transmit time slot on DX output is active carrying out the PCM encoded signal of VFXI3. T36..0:Define time slot number (0 to 127) on which PCM encoded signal of VFXI3 is carried out. If linear mode is selected (LIN=1 of CONF regis- ter) the 16 bits will be carried out as follows: the 8 most significative bits in the programmed time slot, the 8 least significative bits in the following timeslot. Example: if T36..T30=00: TS0 TS1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Pin strap value (value=80h) 100 00 00 0 Referred to FS3. Receive Time Slot channel #0 (DRA0) Addr=17h; Reset Value=00h Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 EN0 R06 R05 R04 R03 R02 R01 R00 EN0=0: Disable reception of selected time slot. EN0=1: Selected receive time slot on DR input is PCM decoded and tranferred to VFRO0 output. R06..0:Define receive time slot number (0 to 127) on carrying the PCM signal to be decoded and tranferred to VFRO0 output.If linear mode is se- lected (LIN=1 of CONF register) the 16 bits will be used as linear code as follows: the 8most sig- nificative bits in the programmed time slot, the 8 least significative bits in the following timeslot. Example: if R06..R00=00: TS0 TS1 15 14 13 12 11 10 9 87654 32 10 Pin strap value (value 80h): 100 0 0 000 Referred to FS0. Receive Time Slot channel #1 (DRA1) Addr=18h; Reset Value=00h Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 EN0 R16 R15 R14 R13 R12 R11 R10 EN1=0: Disable reception of selected time slot. EN1=1: Selected receive time slot on DR input is PCM decoded and tranferred to VFRO1 output. R16..0:Define receive time slot number (0 to 127) on carrying the PCM signal to be decoded and tranferred to VFRO1 output.If linear mode is se- lected (LIN=1 of CONF register) the 16 bits will be used as linear code as follows: the 8most sig- nificative bits in the programmed time slot, the 8 least significative bits in the following timeslot. Example: if R16..R10=00: TS0 TS1 15 14 13 12 11 10 9 87654 32 10 Pin strap value (value=80h) 100 0 0 000 Referred to FS1. Receive Time Slot channel #2 (DRA2) Addr=19h; Reset Value=00h Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 EN2 R26 R25 R24 R23 R22 R21 R20 EN2=0: Disable reception of selected time slot. EN2=1: Selected receive time slot on DR input is PCM decoded and tranferred to VFRO1 output. R26..0:Define receive time slot number (0 to 127) STLC5046 15/27 |
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