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STLC5046 数据表(PDF) 3 Page - STMicroelectronics |
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STLC5046 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 27 page ![]() ANALOG N. Name Type Function 33 VFRO0 AO Receive analog amplifier output channel 0. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 39 VFRO1 AO Receive analog amplifier output channel 1. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 42 VFRO2 AO Receive analog amplifier output channel 2. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 48 VFRO3 AO Receive analog amplifier output channel 3. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 1 2 3 5 6 4 7 8 9 10 27 11 28 29 30 31 32 59 58 57 56 54 55 53 52 51 50 49 43 42 41 39 38 40 48 47 46 44 45 CI/PD0 CO/GR0 CS/PD1 RES RES INT/AMU DX DR VDD CCLK/GR1 VSS VFXI2 VFRO2 SUB VFRO1 VFXI1 CAP VFRO3 N.C. VFXI3 VCC2 VCC3 D98TL405 22 23 24 25 26 60 61 62 63 64 17 18 19 20 21 37 36 34 33 35 VCC1 VCC0 N.C. VFRO0 VFXI0 12 13 14 15 16 N.C. N.C. FS/FS0 TSX MCLK PIN CONNECTION (Top view) PIN DESCRIPTION I/O DEFINITION Type Definition AI Analog Input AO Analog Output ODO Open Drain Output DI Digital Input DO Digital Output DIO Digital Input/Output DTO Digital Tristate Output DPS Digital Power Supply APS Analog Power Supply STLC5046 3/27 |
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