STE2002 datasheet(29/61 Pages) STMICROELECTRONICS

29 / 61 page

STE2002

Bus interfaces

29/61

Figure 34.

Reading sequence

5.3

Parallel interface

The STE2002 parallel Interface is a bidirectional link between the display driver and the

application supervisor. It consists of eleven lines: eight data lines (from DB7 to DB0) and

three control lines. The control lines are: enable (E) for data latch, PD/C for mode selection

and R/W for reading or writing.

The data lines and the control line values are internally latched on E rising edge (fig. 50).

When the parallel interface is selected, if R/W line is set to “one”, D0-D7 lines are configured

as output drivers (low impedence) and it is possible to read the driver I2C address (Fig. 51)

READING SEQUENCE

Write a "00000000" Instruction

Source 8 pulses on SCLK and

Read the I2C Address or Status Byte On SOUT

END OF READING SEQUENCE

SOUT Buffer Configured in High Impedence

LR0078

SOUT Buffer becomes active (Low Impedence)

note: 1) these data are not read by the display Diver

2) SDIN and SOUT can be short circuited if the processor can configure

serial output buffers in high impedence during data read

Table 10.

STE2001-like instruction set

Instruction

D/C

R/W

Description

H=0 or H=1

000000

Read I2C Address

(with Serial Interface

only)

Function Set

H[0]

Power Down

Management; Entry

Mode;

Read Status Byte

(I2C interface only)

Write Data

Writes data to RAM

STE2002 数据表(PDF) 29 Page - STMicroelectronics

STE2002 数据表(HTML) 29 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

数据表下载