AT80C51RA2-RLSIV datasheet(71/86 Pages) ATMEL

71 / 86 page

4188F–8051–01/08

AT/TS8xC51Rx2

11.5.11

External Clock Drive Characteristics (XTAL1)

11.5.12

External Clock Drive Waveforms

Figure 11-11. External Clock Drive Waveforms

11.5.13

AC Testing Input/Output Waveforms

Figure 11-12. AC Testing Input/Output Waveforms

AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing

measurement are made at VIH min for a logic “1” and VIL max for a logic “0”.

11.5.14

Float Waveforms

Figure 11-13. Float Waveforms

For timing purposes a port pin is no longer floating when a 100 mV change from load voltage

occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH

≥ ± 20mA.

Symbol

Parameter

Min

Max

Units

TCLCL

Oscillator Period

TCHCX

High Time

TCLCX

Low Time

TCLCH

Rise Time

TCHCL

Fall Time

TCHCX/TCLCX

Cyclic ratio in X2 mode

VCC-0.5 V

0.45 V

0.7V

0.2V

CC-0.1 V

CHCL

TCLCX

CLCL

CLCH

TCHCX

0.45 V

CC-0.5 V

0.2V

CC+0.9

0.2V

CC-0.1

INPUT/OUTPUT

OL+0.1 V

VOH-0.1 V

FLOAT

LOAD

LOAD+0.1 V

LOAD-0.1 V

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