数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

AT80C51RA2-RLSIV 数据表(PDF) 18 Page - ATMEL Corporation

部件名 AT80C51RA2-RLSIV
功能描述  High Performance 8-bit Microcontroller
PDF  86 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

AT80C51RA2-RLSIV 数据表(HTML) 18 Page - ATMEL Corporation

Back Button AT80C51RA2-RLSIV Datasheet HTML 14Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 15Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 16Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 17Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 18Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 19Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 20Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 21Page - ATMEL Corporation AT80C51RA2-RLSIV Datasheet HTML 22Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 86 page
background image
18
4188F–8051–01/08
AT/TS8xC51Rx2
address bits (DPL) with data. MOVX @ Ri and MOVX @DPTR will generate either read or
write signals on P3.6 (WR) and P3.7 (RD).
The stack pointer (SP) may be located anywhere in the 256 bytes RAM (lower and upper RAM)
internal data memory. The stack may not be located in the XRAM.
Figure 6-1.
Internal and External Data Memory Address
Table 6-1.
Auxiliary Register
AUXR
XRAM
256 bytes
Upper
128 bytes
Internal
Ram
Lower
128 bytes
Internal
Ram
Special
Function
Register
80
80
00
FF(RA, RB, RC)/2FF (RD)
FF
00
FF
External
Data
Memory
0000
0100 (RA, RB, RC) or 0300 (RD)
FFFF
indirect accesses
direct accesses
direct or indirect
accesses
AUXR
Address 08EH
-
-
-
-
-
-
EXTRAM
AO
Reset value
X
X
X
X
X
X
0
0
Symbol
Function
-
Not implemented, reserved for future use. (1)
1.
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new features. In that case, the reset or inactive value of the new bit will be 0,
and its active value will be 1. The value read from a reserved bit is indeterminate.
AO
Disable/Enable ALE
AO
Operating Mode
0
ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if X2 mode
is used)
1
ALE is active only during a MOVX or MOVC instruction
EXTRAM
Internal/External RAM (00H-FFH) access using MOVX @ Ri/ @ DPTR
EXTRAM
Operating Mode
0
Internal XRAM access using MOVX @ Ri/ @ DPTR
1
External data memory access



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com