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TSB14C01AI 数据表(PDF) 23 Page - Texas Instruments

部件名 TSB14C01AI
功能描述  5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER
PDF  31 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TSB14C01AI 数据表(HTML) 23 Page - Texas Instruments

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TSB14C01A, TSB14C01AI, TSB14C01AM
5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER
SGLS107A – FEBRUARY 1999 – REVISED NOVEMBER 1999
23
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
format of arbitration sequence
The following format for the arbitration sequence should be used:
PRIORITY
ARBITRATION NUMBER
4 bits
6 bits
arbitration sequence
D Each module on the backplane has a unique 6-bit arbitration number that is equal to the node’s physical_ID.
D The arbitration number is preceded by four bits of priority. The MSB of the priority field is transmitted first.
The LSB of the priority field is followed by the MSB of the arbitration number.
D Dynamic assignment of priority is accommodated.
D The lowest priority level (all zeroes) is reserved for fair arbitration, and the highest priority level (all ones)
is reserved for the identification of the cycle start packet.
arbitration
Unless a node is using immediate arbitration to access the bus (in which case there is no contention for the bus),
it is possible that more than one node can attempt to access the bus at a given time. Consequently, it is
necessary for a node to arbitrate for the bus in order to gain access to the bus.
NOTE
A node uses immediate arbitration to send an acknowledge. Since there is no contention for the
bus in this case, arbitration is not necessary. A node that is transmitting an acknowledge does not
arbitrate for the bus, but merely waits for an acknowledge gap to be detected before it begins
transmission. If a node is attempting to gain access to the bus without using immediate access, it
must first arbitrate for the bus.
Arbitration occurs in response to a phy arbitration request from the link. Nodes begin arbitrating once the bus
has become idle for a predetermined amount of time (the appropriate gap indication occurs). Once this happens,
nodes begin a bit-by-bit transmission of their arbitration sequence.
A node can obtain access to the bus in a limited number of ways. Since some arbitration classes allow nodes
to begin arbitration before others, nodes arbitrating with certain arbitration classes can detect that the bus is
busy before they can begin to arbitrate. In this way, certain arbitration classes can be bypassed. For example,
fair and urgent nodes do not get a chance to arbitrate when another node is sending an acknowledge or when
it is arbitrating for an isochronous transfer.
The backplane environment supports the fair, urgent, cycle_master, isochronous, and immediate arbitration
classes.
fairness intervals
The fairness protocol is based on the concept of a fairness interval. A fairness interval consists of one or more
periods of bus activity separated by short idle periods called subaction gaps and is followed by a longer idle
period known as an arbitration reset gap. At the end of each gap, bus arbitration is used to determine the next
bus owner. This concept is shown in Figure 11.



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