TSB14C01A, TSB14C01AI, TSB14C01AM

5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER

SGLS107A – FEBRUARY 1999 – REVISED NOVEMBER 1999

27

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

urgent arbitration (continued)

In the backplane environment, the natural priority is the concatenation of the 4-bit urgent priority level with the

physical_ID. These results are listed in the following list.

arbitration by the cycle_master

This arbitration class is used by the cycle_master when it needs to arbitrate for the transmission of a cycle_start

packet. It is similar to the urgent arbitration class, except that the priority field is defined to be all ones. Arbitration

begins once a subaction gap is detected, regardless of the state of the arbitration_enable signal or the

urgent_count.

isochronous arbitration

This arbitration class is used by nodes arbitrating to send isochronous packets. Arbitration begins once an

acknowledge gap is detected, regardless of the state of the arbitration_enable signal or the urgent_count.

Because an acknowledge gap is shorter than an arbitration reset gap and a subaction gap, nodes arbitrating

with this class win the bus before nodes waiting to send fair, urgent, or cycle_master packets. The priority field

is not used in this arbitration class.

immediate arbitration

This arbitration class is used by nodes sending an acknowledge to a received packet. Transmission of the

acknowledge (beginning with a DATA_PREFIX) occurs as soon as an acknowledge gap is detected. This

arbitration class is referred to as immediate because an arbitration sequence is not transmitted to obtain access

to the bus (i.e., the node does not actually arbitrate for the bus).

backplane phy reset

Upon a power_reset event (i.e., power up), registers and control and status registers (CSRs) associated with

the operation of the phy are initialized to their default values. State machines associated with phy operations

are initialized. The BUS_RESET signal is not transmitted on the bus by the phy.