ADP2114ACPZ-R7 datasheet(25/40 Pages) AD

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ADP2114

Rev. 0 | Page 25 of 40

SETTING THE OSCILLATOR FREQUENCY

The ADP2114 channels can be set to operate in one of the three

preset switching frequencies: 300 kHz, 600 kHz, or 1.2 MHz.

For 300 kHz operation, connect the FREQ pin to GND. For

600 kHz or 1.2 MHz operation, connect a resistor between the

FREQ pin and GND, as shown in Table 5.

Table 5. Oscillator Frequency Setting

RFREQ (Ω) ± 5%

fSW (kHz)

0 to GND

300

8.2 k to GND

600

27 k to GND

1200

Choice of the switching frequency depends on the required

dc-to-dc conversion ratio and is limited by the minimum and

maximum controllable duty cycle shown on Figure 72. This is

due to the requirement of minimum on and minimum off times

for current sensing and robust operation. The choice of

switching frequency is also determined by the need for small

external components. For small, area limited power solutions,

use of higher switching frequencies is recommended.

100

200

400

600

800

1000

1200

SWITCHING FREQUENCY (kHz)

MAXIMUM LIMIT

MINIMUM LIMIT; VIN = 2.75V

MINIMUM LIMIT; VIN = 3.3V

MINIMUM LIMIT; VIN = 5.5V

Figure 72. Duty Cycle Working Limits

For single output, multiphase applications that operate at close

to 50% duty cycle, it is recommended to use the 1.2 MHz

switching frequency to minimize crosstalk between the phases.

SYNCHRONIZATION AND CLKOUT

The ADP2114 can be configured to output an internal clock or

synchronize to an external clock at the STNC/CLKOUT pin.

The SYNC/CLKOUT pin is a bidirectional pin configured by

the SCFG pin, as shown in Table 6.

Table 6. SYNC/CLKOUT Configuration Setting

SCFG

SYNC/CLKOUT

GND

Input

VDD

Output

The converter switching frequency, fSW, is half of the synchroni-

zation frequency fSYNC/fCLKOUT as shown in Equation 4, irrespective

of whether SYNC/CLKOUT is configured as an input or output.

fSYNC/fCLKOUT = 2 × fSW

(4)

An external clock can be applied to the SYNC/CLKOUT pin

when configured as an input to synchronize multiple ADP2114s

to the same external clock. The fSYNC range is 400 kHz to 4 MHz,

which produces fSW in the 200 kHz to 2 MHz range. See Figure 73

for an illustration.

VDD

SYNC

SCFG FREQ

27kΩ

(

fSW = fSYNC/2)

ADP2114

VDD

SYNC

SCFG FREQ

27kΩ

(

fSW = fSYNC/2)

ADP2114

TO OTHER ADP2114

VIN

fSYNC

EXTERNAL CLOCK (2.4MHz)

Figure 73. Synchronization with External Clock (fSW = 1.2 MHz in This Case)

When synchronizing to an external clock, the switching

frequency fSW must be set close to half of the expected external

clock frequency by appropriately terminating the FREQ pin as

shown in Table 5.

VDD

SYNC

SCFG FREQ

8.2kΩ

(

fSW = fSYNC/2)

ADP2114

VDD

CLKOUT

SCFG FREQ

8.2kΩ

(

fSW = 2 × fSW)

ADP2114

VIN

fSYNC = 2 × fSW

TO OTHER ADP2114

NOTES

fSW = 600kHz SET FOR BOTH ADP2114.

Figure 74. ADP2114 to SYNC with Another ADP2114

(Note that the SCFG of the master is tied to VDD.)

The ADP2114 can also be configured to output a clock signal

on the SYNC/CLKOUT pin to synchronize multiple ADP2114s

to it (see Figure 74). The CLKOUT signal is 90º phase shifted to

the internal clock of the channels so that the master ADP2114

and the slave channels are out of phase (see Figure 75 for

additional information).

CH3 5.0V

CH1 5.0V

CH4 5.0V

M1.0µs

A CH4

3.00V

CHANNEL 1 SW

CHANNEL 2 SW

INTERNAL CLKOUT

Figure 75. CLKOUT Waveforms

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