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ADP5020ACPZ-R7 数据表(PDF) 6 Page - Analog Devices

部件名 ADP5020ACPZ-R7
功能描述  Power Management Unit for Imaging Modules
PDF  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5020ACPZ-R7 数据表(HTML) 6 Page - Analog Devices

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ADP5020
Rev. 0 | Page 6 of
28
DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR
Table 4.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT VOLTAGE
Adjustable Range1
VOUT2
4-bit range
1.1
1.8
V
Initial Accuracy
TA = 25°C, VDD2 = 3.6 V, VOUT2 = 1.2 V, ILOAD = 20 mA
−1
+1
%
Total Accuracy
VDD2 = 2.5 V to 5 V, ILOAD = 10 mA to 250 mA
−5
+4
%
Load Regulation
ILOAD = 10 mA to 250 mA
0.2
%
Line Regulation
VDDA = 1.8 V, VDD2 = 2.5 V to 5 V
0.15
%
CURRENT
Maximum Output Current
IBK2MAX
250
mA
Quiescent Current
IQBK2
ILOAD = 0 mA
4
6.5
mA
POWER
Low-Side Power nMOSFET
RDSON2
ID = 200 mA
240
330
mΩ
High-Side Power pMOSFET
RDSON2
ID = 200 mA
300
450
mΩ
SWITCH CURRENT LIMIT
ICL2
360
630
850
mA
MINIMUM ON TIME
tMIN2
55
ns
MAXIMUM DUTY CYCLE
DMAX2
87.5
90
%
SOFT START TIME
tSS2
900
μs
COUT DISCHARGE SWITCH ON RESISTANCE
RDIS2
0.7
1
1.3
kΩ
1 See
(the BUCK2_LDO_VSEL register, Address 0x02) for details.
Table 14
VOUT3 SPECIFICATIONS, LOW DROPOUT (LDO) REGULATOR
Table 5.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT VOLTAGE
Adjustable Range1
VOUT3
100 mV step, 4-bit range
1.8
3.3
V
Initial Accuracy
TA = 25°C, VDD3 = 3.6 V, VOUT3 = 1.8 V, ILOAD = 10 mA
−1.5
+1.5
%
Total Accuracy
VDD3 = 2.5 V to 5 V, ILOAD = 0 mA to 150 mA
−5
+4
%
Load Regulation
ILOAD = 10 mA to 100 mA
0.45
0.75
%
Line Regulation
ILOAD = 100 mA2
0.15
0.30
%
CURRENT
Maximum Output Current
ILDOMAX
150
mA
Dropout Voltage
VLDODROP
At 100 mA, VOUT3 = 3.3 V
70
100
mV
Quiescent Current
IQ
ILOAD = 0 mA
45
85
μA
Short-Circuit Current Limit
200
400
600
mA
Power Supply Rejection Ratio
PSRR
f = 1 kHz, VDD3 = 5 V, VOUT3 = 3.3 V, ILOAD = 50 mA
47
dB
f = 10 kHz, VDD3 = 5 V, VOUT3 = 3.3 V, ILOAD = 50 mA
44
dB
SOFT START TIME
tSS2
70
μs
COUT DISCHARGE SWITCH ON RESISTANCE
RDIS8
0.7
1
1.3
kΩ
1 See
(the BUCK_LDO_VSEL register, Address 0x02) for details.
Table 14
2 VDD3 > VOUT3 + LDODROP.



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