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ADP5020ACPZ-R7 数据表(PDF) 22 Page - Analog Devices |
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ADP5020ACPZ-R7 数据表(HTML) 22 Page - Analog Devices |
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22 / 28 page ![]() ADP5020 Rev. 0 | Page 22 of 2 8 LDO INPUT FILTER To improve the LDO input-to-output ripple suppression in the critical switching frequency range of the buck converters, it may be necessary to add an LC filter tuned to 1 MHz, as shown in Figure 28. Additional tests and simulation must be performed to assess if this filter is necessary. The filter resonance frequency is determined by the following equation: C8 L3 f LC × × π × = 2 1 (3) where L3 = 250 nH, assuming that fLC = 1 MHz and C8 = 100 nF. The inductor must be able to withstand the LDO load current, including the overload condition, which is limited to 400 mA. VBATT SW1 VOUT1 L1 2.2µH 3.3V 2.8V LDO INPUT FILTER L3 C6 10µF C1 10µF C8 0.1µF C3 1µF VDD3 VOUT1 VOUT3 BUCK 1 LDO ADP5020 Figure 28. Optional LDO Input Filter |
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