数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

ADP5020ACPZ-R7 数据表(PDF) 18 Page - Analog Devices

部件名 ADP5020ACPZ-R7
功能描述  Power Management Unit for Imaging Modules
PDF  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5020ACPZ-R7 数据表(HTML) 18 Page - Analog Devices

Back Button ADP5020ACPZ-R7 Datasheet HTML 14Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 15Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 16Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 17Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 18Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 19Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 20Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 21Page - Analog Devices ADP5020ACPZ-R7 Datasheet HTML 22Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 28 page
background image
ADP5020
Rev. 0 | Page 18 of
28
Activation Waveforms
tREG1
tREG2
tREG3
tXSHTDN
VUVLOR
VDDx
POR
INTERNAL
POR
EN
BUCK 1
BUCK 2
LDO
XSHTDN
I2C BUS
I2C SEQUENCER
REGISTERS
PROGRAMMING
EN_
ALL = 1
EN_
ALL = 0
POK
POK
POK
Figure 23. Regulators Are Activated by I2C Command
tREG1
tREG2
tREG3
tXSHTDN
VDDx
POR
INTERNAL
POR
EN
BUCK 1
BUCK 2
LDO
XSHTDN
I2C BUS
I2C SEQUENCER
REGISTERS
PROGRAMMING
POK
POK
POK
Figure 24. Activation Command Using the EN Pin
When activated through the EN pin, the sequencer is affected
only by the I2C commands that set or clear the regulator power
good masking bits: Bit 3 (BK1_XSHTDN), Bit 2 (BK2_XSHTDN),
and Bit 1 (LDO_XSHTDN) in the OPERATIONAL_CONTROL
register (Address 0x04). See the Default Power-On Sequence with
EN Pin section for more information. The sequence order of the
regulators is factory programmed through fuses, but the delays
between the regulators (tREG1, tREG2, and tREG3) are fixed and cannot
be changed.
The EN_ALL bit (Bit 4) in the REG_CONTROL_STATUS regi-ster
(Address 0x03) has the same functionality as the EN pin. The
sequencer has an antiglitch function that allows it to ignore supply
voltage dip if glitch time is less than 50 μs (see Figure 25).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com