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AT89LP428 数据表(PDF) 64 Page - ATMEL Corporation |
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AT89LP428 数据表(HTML) 64 Page - ATMEL Corporation |
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64 / 149 page ![]() 64 3654A–MICRO–8/09 AT89LP428/828 Notes: 1. All writes/reads to/from T2CCC will access channel X as currently selected by T2CCA.The control registers for the remain- ing unselected channels are not accessible. 2. Analog Comparator A events are determined by the CMA2-0 bits in ACSRA. See Table 18-1 on page 102. 3. Analog Comparator B events are determined by the CMB 2-0 bits in ACSRB. See Table 18-2 on page 103. 4. Asymmetrical versus Symmetrical PWM is determined by the Timer 2 Count Mode. See “Pulse Width Modulation Mode” on page 68. Table 13-4. T2CCC – Timer/Counter 2 Compare/Capture Control T2CCC Address = 0D4H Reset Value = 00X0 0000B Not Bit Addressable CIENx CDIRx –CTCx CCMx CxM2 CxM1 CxM0 Bit 7 654 321 0 Symbol Function CIENx Channel X Interrupt Enable. When set, channel X’s interrupt flag, CCFx in T2CCF, will generate an interrupt when ECC = 1. Clear to disable interrupts from channel X. CDIRx Channel X Capture Direction. In dual-slope modes, a compare/capture event on channel X will store the current count direction into CDIRx. Up-counting = 0 and down-counting = 1. Modifying this bit has no effect. CTCx Clear Timer on Compare/Capture of Channel X. When set, the Timer 2 registers TL2 and TH2 will be cleared by a compare/capture event on channel X. When cleared, Timer 2 is unaffected by channel X events. CCMx Channel X Compare/Capture Mode. When CCMx = 1, channel X operates in compare mode. When CCMx = 0, channel X operates in capture mode. CxM [2 - 0] Channel X Mode. Selects the output/input events for compare/capture channel X. CxM2 CxM1 CxM0 Capture Event (CCMx = 0) 000 Disabled 0 0 1 Trigger on negative edge of CCx pin 0 1 0 Trigger on positive edge of CCx pin 0 1 1 Trigger on either edge of CCx pin 1 0 0 Trigger on Timer 0 overflow 1 0 1 Trigger on Timer 1 overflow 1 1 0 Trigger on Analog Comparator A Event(2) 1 1 1 Trigger on Analog Comparator B Event(3) CxM2 CxM1 CxM0 Compare Action (CCMx = 1) 000 Output disabled (interrupt only) 001 Set CCx pin on compare match 010 Clear CCx pin on compare match 0 1 1 Toggle CCx pin on compare match 100 Inverting Pulse Width Modulation(4) 1 0 1 Non-inverting Pulse Width Modulation(4) 110 Reserved 111 Reserved |
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