AT89LP428 datasheet(52/149 Pages) ATMEL

52 / 149 page

3654A–MICRO–8/09

AT89LP428/828

12. Enhanced Timer 2

The AT89LP428/828 includes a 16-bit Timer/Counter 2 with the following features:

•16-bit timer/counter with one 16-bit reload/capture register

• One external reload/capture input

• Up/Down counting mode with external direction control

•UART baud rate generation

•Output-pin toggle on timer overflow

•Dual slope symmetric operating modes

Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The

type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has three operating modes:

capture, auto-reload (up or down counting), and baud rate generator. The modes are selected

by bits in T2CON and T2MOD, as shown in Table 12-3. Timer 2 also serves as the time base for

the Compare/Capture Array (see “Compare/Capture Array” on page 61).

Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the register is incre-

mented every clock cycle. Since a clock cycle consists of one oscillator period, the count rate is

equal to the oscillator frequency. The timer rate can be prescaled by a value between 1 and 16

using the Timer Prescaler (see Table 6-2 on page 23).

In the Counter function, the register is incremented in response to a 1-to-0 transition at its corre-

sponding external input pin, T2. In this function, the external input is sampled every clock cycle.

When the samples show a high in one cycle and a low in the next cycle, the count is incre-

mented. The new count value appears in the register during the cycle following the one in which

the transition was detected. Since two clock cycles are required to recognize a 1-to-0 transition,

the maximum count rate is 1/2 of the oscillator frequency. To ensure that a given level is sam-

pled at least once before it changes, the level should be held for at least one full clock cycle.

The following definitions for Timer 2 are used in the subsequent paragraphs:

Table 12-1.

Timer 2 Operating Modes

RCLK + TCLK

CP/RL2

DCEN

T2OE

TR2

Mode

16-bit Auto-reload

16-bit Auto-reload Up-down

16-bit Capture

XXX

Baud Rate Generator

Frequency Generator

(Off)

Table 12-2.

Timer 2 Definitions

Symbol

Definition

MIN

0000H

MAX

FFFFH

BOTTOM

16-bit value of {RCAP2H,RCAP2L} (standard modes)

TOP

16-bit value of {RCAP2H,RCAP2L} (enhanced modes)

AT89LP428 数据表(PDF) 52 Page - ATMEL Corporation

AT89LP428 数据表(HTML) 52 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载