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AT89LP428 数据表(PDF) 37 Page - ATMEL Corporation |
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AT89LP428 数据表(HTML) 37 Page - ATMEL Corporation |
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37 / 149 page ![]() 37 3654A–MICRO–8/09 AT89LP428/828 10.1.2 Input-only Mode The input only port configuration is shown in Figure 10-2. The output drivers are tristated. The input includes a Schmitt-triggered input for improved input noise rejection. The input circuitry of P3.2, P3.3, P3.6, P4.0 and P4.1 is not disabled during Power-down (see Figure 10-3) and there- fore these pins should not be left floating during Power-down when configured in this mode. Figure 10-2. Input Only Figure 10-3. Input Circuit for P3.2, P3.3 and P3.6 10.1.3 Open-drain Output The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con- figured in this manner must have an external pull-up, typically a resistor tied to V CC. The pull- down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu- ration is shown in Figure 10-4. The input circuitry of P3.2, P3.3 and P3.6 is not disabled during Power-down (see Figure 10-3) and therefore these pins should not be left floating during Power- down when configured in this mode. Figure 10-4. Open-drain Output Port Pin Input Data PWD Port Pin Input Data Port Pin From Port Register Input Data PWD |
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