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AT89LP428 数据表(PDF) 18 Page - ATMEL Corporation |
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AT89LP428 数据表(HTML) 18 Page - ATMEL Corporation |
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18 / 149 page  18 3654A–MICRO–8/09 AT89LP428/828 For assemblers that do not support this notation, the 0A5H prefix must be declared in-line: EX: DB 0A5H INC DPTR ; equivalent to INC /DPTR A summary of data pointer instructions with fast context switching is listed in Table 5-1. 5.1.1 Data Pointer Update The Dual Data Pointers on the AT89LP428/828 include two additional features that control how the data pointers are updated. The data pointer decrement bits, DPD1 and DPD0 in DPCF, con- figure the INC DPTR instruction to act as DEC DPTR. The resulting operation will depend on DPS as shown in Table 5-2. The data pointer update bits, DPU1 and DPU0, allow MOVX @DPTR and MOVC @DPTR instructions to update the selected data pointer automatically in a post-increment or post- decrement fashion. The direction of update depends on the DPD1 and DPD0 bits as shown in Table 5-3. Table 5-1. Data Pointer Instructions Instruction Operation DPS = 0 DPS = 1 JMP @A+DPTR JMP @A+DPTR0 JMP @A+DPTR1 MOV DPTR, #data16 MOV DPTR0, #data16 MOV DPTR1, #data16 MOV/DPTR, #data16 MOV DPTR1, #data16 MOV DPTR0, #data16 INC DPTR INC DPTR0 INC DPTR1 INC/DPTR INC DPTR1 INC DPTR0 MOVC A,@A+DPTR MOVC A,@A+DPTR0 MOVC A,@A+DPTR1 MOVC A,@A+/DPTR MOVC A,@A+DPTR1 MOVC A,@A+DPTR0 MOVX A,@DPTR MOVX A,@DPTR0 MOVX A,@DPTR1 MOVX A,@/DPTR MOVX A,@DPTR1 MOVX A,@DPTR0 MOVX @DPTR, A MOVX @DPTR0, A MOVX @DPTR1, A MOVX @/DPTR, A MOVX @DPTR1, A MOVX @DPTR0, A Table 5-2. INC DPTR Behavior DPD1 DPD0 Operation DPS = 0 DPS = 1 INC DPTR INC /DPTR INC DPTR INC /DPTR 0 0 INC DPTR0 INC DPTR1 INC DPTR1 INC DPTR0 0 1 DEC DPTR0 INC DPTR1 INC DPTR1 DEC DPTR0 1 0 INC DPTR0 DEC DPTR1 DEC DPTR1 INC DPTR0 1 1 DEC DPTR0 DEC DPTR1 DEC DPTR1 DEC DPTR0 |
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