AT89LP428 datasheet(61/149 Pages) ATMEL

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3654A–MICRO–8/09

AT89LP428/828

Figure 12-8. Timer 2 in Clock-out Mode

13. Compare/Capture Array

The AT89LP428/828 includes a four channel Compare/Capture Array (CCA) that performs a

variety of timing operations including input event capture, output compare waveform generation

and pulse width modulation (PWM). Timer 2 serves as the time base for the four 16-bit com-

pare/capture modules. The CCA has the following features:

•Four 16-bit Compare/Capture channels

• Common time base provided by Timer 2

• Selectable external and internal capture events including pin change, timer overflow and

comparator output change

• Symmetric/Asymmetric PWM with selectable polarity

•Multi-phasic PWM outputs

• One interrupt flag per channel with a common interrupt vector

The block diagram of the CCA is given in Figure 13-1. Each channel consists of an 8-bit control

address register T2CCA provides an index into the array. The control, data low and data high

bytes of the currently indexed channel are accessed through the T2CCC, T2CCL and T2CCH

registers, respectively.

Each channel can be individually configured for capture or compare mode. Capture mode is the

default setting. During capture mode, the current value of the time base is copied into the chan-

nel’s data register when the specified external or internal event occurs. An interrupt flag is set at

the same time and the time base may be optionally cleared. To enable compare mode, the

CCMx bit in the channel’s control register (CCCx) should be set to 1. In compare mode an inter-

rupt flag is set and an output pin is optionally toggled when the value of the time base matches

the value of the channel’s data register. The time base may also be optionally cleared on a com-

pare match.

OSC

T2EX PIN

T2 PIN

TR2

Timer 2

Interrupt

RCAP2H

RCAP2L

TL2

TH2

C/T2

EXF2

Transition

Detector

EXEN2

÷TPS

÷2

T2OE

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