ATmega169PV-8MCH datasheet(85/393 Pages) ATMEL

85 / 393 page

8018N–AVR–08/09

ATmega169P

13.3.7

Alternate Functions of Port G

The alternate pin configuration is as follows:

Note:

1. Port G, PG5 is input only. Pull-up is always on.

See Table 27-3 on page 296 for RSTDISBL fuse.

The alternate pin configuration is as follows:

• RESET – Port G, Bit 5

RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function

as input with pull-up always on.

• T0/SEG23 – Port G, Bit 4

T0, Timer/Counter0 Counter Source.

SEG23, LCD front plane 23

• T1/SEG24 – Port G, Bit 3

T1, Timer/Counter1 Counter Source.

SEG24, LCD front plane 24

Table 13-20. Overriding Signals for Alternate Functions in PF3:PF0

Signal

Name

PF3/ADC3

PF2/ADC2

PF1/ADC1

PF0/ADC0

PUOE

0000

PUOV

0000

DDOE

0000

DDOV

0000

PVOE

0000

PVOV

0000

PTOE

––––

DIEOE

0000

DIEOV

0000

––––

AIO

ADC3 INPUT

ADC2 INPUT

ADC1 INPUT

ADC0 INPUT

Table 13-21. Port G Pins Alternate Functions

(1)

Port Pin

Alternate Function

PG5

RESET

PG4

T0/SEG23 (Timer/Counter0 Clock Input or LCD Front Plane 23)

PG3

T1/SEG24 (Timer/Counter1 Clock Input or LCD Front Plane 24)

PG2

SEG4 (LCD Front Plane 4)

PG1

SEG13 (LCD Front Plane 13)

PG0

SEG14 (LCD Front Plane 14)

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