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ATmega169PV-8MCH 数据表(PDF) 46 Page - ATMEL Corporation |
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ATmega169PV-8MCH 数据表(HTML) 46 Page - ATMEL Corporation |
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46 / 393 page  46 8018N–AVR–08/09 ATmega169P • Bit 3 - PRTIM1: Power Reduction Timer/Counter1 Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1 is enabled, operation will continue like before the shutdown. • Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to the module. When waking up the SPI again, the SPI should be re initialized to ensure proper operation. • Bit 1 - PRUSART0: Power Reduction USART0 Writing a logic one to this bit shuts down the USART by stopping the clock to the module. When waking up the USART again, the USART should be re initialized to ensure proper operation. • Bit 0 - PRADC: Power Reduction ADC Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down. The analog comparator cannot use the ADC input MUX when the ADC is shut down. Note: The Analog Comparator is disabled using the ACD-bit in the ”ACSR – Analog Comparator Control and Status Register” on page 213. |
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