ATmega169PV-8MCH datasheet(5/393 Pages) ATMEL

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8018N–AVR–08/09

ATmega169P

The AVR core combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs up to ten times faster than con-

ventional CISC microcontrollers.

The ATmega169P provides the following features: 16K bytes of In-System Programmable Flash

with Read-While-Write capabilities, 512 bytes EEPROM, 1K byte SRAM, 53 general purpose I/O

lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip

Debugging support and programming, a complete On-chip LCD controller with internal step-up

voltage, three flexible Timer/Counters with compare modes, internal and external interrupts, a

serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-

channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial

port, and five software selectable power saving modes. The Idle mode stops the CPU while

allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The

Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip

functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous

timer and the LCD controller continues to run, allowing the user to maintain a timer base and

operate the LCD display while the rest of the device is sleeping. The ADC Noise Reduction

mode stops the CPU and all I/O modules except asynchronous timer, LCD controller and ADC,

to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator

Oscillator is running while the rest of the device is sleeping. This allows very fast start-up com-

bined with low-power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The

On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI

serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot pro-

gram running on the AVR core. The Boot program can use any interface to download the

application program in the Application Flash memory. Software in the Boot Flash section will

continue to run while the Application Flash section is updated, providing true Read-While-Write

operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a

monolithic chip, the Atmel ATmega169P is a powerful microcontroller that provides a highly flex-

ible and cost effective solution to many embedded control applications.

The ATmega169P AVR is supported with a full suite of program and system development tools

including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,

and Evaluation kits.

ATmega169PV-8MCH 数据表(PDF) 5 Page - ATMEL Corporation

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