ATmega169PV-8MCH datasheet(45/393 Pages) ATMEL

45 / 393 page

8018N–AVR–08/09

ATmega169P

9.9

9.9.1

SMCR – Sleep Mode Control Register

The Sleep Mode Control Register contains control bits for power management.

• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the five available sleep modes as shown in Table 9-2.

Note:

1. Standby mode is only recommended for use with external crystals or resonators.

• Bit 1 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

9.9.2

PRR – Power Reduction Register

• Bit 7:5 - Res: Reserved bits

These bits are reserved and will always read as zero.

• Bit 4 - PRLCD: Power Reduction LCD

Writing logic one to this bit shuts down the LCD controller. The LCD controller must be disabled

and the display discharged before shut down. See "Disabling the LCD" on page 217 for details

on how to disable the LCD controller.

Bit

765

432

0x33 (0x53)

–

SM2

SM1

SM0

SMCR

Read/Write

R/W

Initial Value

Table 9-2.

Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

Idle

ADC Noise Reduction

Power-down

Power-save

Reserved

Standby(1)

Reserved

Bit

(0x64)

–

PRLCD

PRTIM1

PRSPI

PRUSART0

PRADC

PRR

Read/Write

R/W

Initial Value

ATmega169PV-8MCH 数据表(PDF) 45 Page - ATMEL Corporation

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