ATmega169PV-8MCH datasheet(59/393 Pages) ATMEL

59 / 393 page

8018N–AVR–08/09

ATmega169P

;

0x1C2E

RESET: ldi

r16,high(RAMEND); Main program start

0x1C2F

out

SPH,r16

; Set Stack Pointer to top of RAM

0x1C30

ldi

r16,low(RAMEND)

0x1C31

out

SPL,r16

0x1C32

sei

; Enable interrupts

0x1C33

<instr>

xxx

11.2

Moving Interrupts Between Application and Boot Space

The General Interrupt Control Register controls the placement of the Interrupt Vector table, see

”MCUCR – MCU Control Register” on page 60.

To avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol-

lowed to change the IVSEL bit:

Write the Interrupt Vector Change Enable (IVCE) bit to one.

Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.

Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled

in the cycle IVCE is set, and they remain disabled until after the instruction following the write to

IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status

Note:

If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,

interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed

in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while

executing from the Boot Loader section. Refer to the section ”Boot Loader Support – Read-While-

Write Self-Programming” on page 279 for details on Boot Lock bits.

The following example shows how interrupts are moved.

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