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ATmega16HVB 数据表(PDF) 114 Page - ATMEL Corporation

部件名 ATmega16HVB
功能描述  8-bit Microcontroller with 16K/32K Bytes In-System Programmable Flash
PDF  273 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

ATmega16HVB 数据表(HTML) 114 Page - ATMEL Corporation

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8042A–AVR–07/09
ATmega16HVB/32HVB
19.7.4
CADICH and CADICL – CC-ADC Instantaneous Current
When a CC-ADC Instantaneous Current conversion is complete, the result is found in these two
registers. CADIC15:0 represents the converted result in 2's complement format. Bits 12:0 are
the 13-bit ADC result (including sign), while bit 15:13 are the sign extension bits.
When CADICL is read, the CC-ADC Instantaneous Current register is not updated until CADCH
is read. Reading the registers in the sequence CADICL, CADICH will ensure that consistent val-
ues are read. When a conversion is completed, both registers must be read before the next
conversion is completed, otherwise data will be lost.
19.7.5
CADAC3, CADAC2, CADAC1 and CADAC0 – CC-ADC Accumulate Current
The CADAC3, CADAC2, CADAC1 and CADAC0 Registers contain the Accumulate Current
measurements in 2’s complement format. Bits 17:0 are the 18-bit ADC result (including sign),
while bit 31:18 are the sign extension bits.
When CADAC0 is read, the CC-ADC Accumulate Current register is not updated until CADAC3
is read. Reading the registers in the sequence CADAC0, CADAC1, CADAC2, CADAC3 will
ensure that consistent values are read. When a conversion is completed, all four registers must
be read before the next conversion is completed, otherwise data will be lost.
Table 19-3.
Input Voltage Range and the conversion value step-size for the CADVSE
settings.
CADVSE
Voltage Range
Step-size CADAC
Step-size CADIC
0
± 200 mV
1.67 µV
53.7 µV
1
± 100 mV
0.84 µV
26.9 µV
Bit
15141312
1110
9
8
(0xE5)
CADIC[15:8]
CADICH
(0xE4)
CADIC[7:0]
CADICL
Bit
765
43
210
Read/Write
R
RRR
RR
RR
R
RRR
RR
RR
Initial Value
0
0
0
0
0
0
0
0
000
00
000
Bit
313029
2827
262524
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6543210
(0xE3)
CADAC[31:24]
CADAC3
(0xE2)
CADAC[23:16]
CADAC2
(0xE1)
CADAC[15:8]
CADAC1
(0xE0)
CADAC[7:0]
CADAC0
Read/Write
RRRRR
RRR
RRRRR
RRR
RRRRR
RRR
Initial Value
0
0000000
0
0000000
0
0000000



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