ADM1029ARQZ-R7 datasheet(27/50 Pages) ONSEMI

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ADM1029

GENERAL PURPOSE LOGIC INPUT/OUTPUTS

The ADM1029 has six dual-function pins (see Pin Function

Descriptions section) that may be configured as general-purpose

Logic I/O pins by setting the appropriate bit(s) of the GPIO

Present/AIN Register (address 05h) or as their alternate func-

tions by clearing these bits.

When configured as GPIO pins, each GPIO pin has a Behavior

used to configure the operation of the pin.

The GPIO pins may be configured as inputs or outputs. When

used as inputs, they may be configured to:

• Be active high or active low.

• Set/clear a bit in the Behavior Register when GP input is

asserted/deasserted.

• Latch a bit in the Behavior Register when GP input is asserted

(must be cleared by software).

• Assert CFAULT when GP input asserted.

• Assert INT when GP input asserted.

• Set fan(s) to alarm speed when GP input asserted.

• Set fan(s) to hot-plug speed when GP input asserted.

When used as outputs, they may be configured to:

• Be active high or low

• Be asserted if a High Temperature Limit is exceeded.

• Be asserted if a temperature measurement falls below a

low limit.

• Be asserted if a fan fault is detected.

• Be asserted if a fan tach limit is exceeded.

• Be asserted if an AIN high limit is exceeded.

• Be asserted if an analog input falls below a low limit.

Figure 19 shows how to configure the GPIO pins to handle

different out-of-limit and fault events.

CFAULT OUTPUT

The Cascade Fault output (CFAULT), is an open-drain, active

low output, intended to communicate fault conditions to other

ADM1029s in a system, without the intervention of the host pro-

cessor. The other ADM1029’s may then adjust their fans’ speed

to compensate, depending on the settings of various registers.

CFAULT is asserted if any of the following conditions occurs:

• A hot-plug event.

• Setting Bit 5 of the Configuration Register (address 01h)

forces CFAULT to be asserted.

• When a GPIO pin is configured as an input by setting Bit 0 of

the corresponding GPIO Behavior Register and Bit 2 of the

GPIO Behavior Register is also set, CFAULT will be asserted

when the logic input is asserted (high or low depending on the

polarity bit, Bit 1 of the corresponding GPIO Behavior Register).

• If Bit 0 of a Temp. Fault Action Register is set (40h—Local

Sensor, 41h—Remote 1, 42h—Remote 2), CFAULT will be

asserted if the corresponding temperature high limit is exceeded.

• If Bit 4 of a Temp. Fault Action Register is set, CFAULT will

be asserted if a temperature input crosses the corresponding

temperature low limit, the direction depending on the setting

of Bit 3 of the Temp. Fault Action Register. (0 = CFAULT

when input goes below low limit, 1 = CFAULT when input

goes above low limit).

• If Bit 0 of a Fan Fault Action Register (18h or 19h) is set,

CFAULT will be asserted when a tach measurement for the

corresponding fan exceeds the set limit.

• If Bit 0 of a Fan Fault Action Register (18h or 19h) is set,

CFAULT will be asserted, when the fan fault input pin for

the corresponding fan is asserted (low).

• If Bit 0 of an AIN Behavior Register is set (50h—AIN0,

51h—AIN1), CFAULT will be asserted if the corresponding

AIN high limit is exceeded.

• If Bit 4 of an AIN Behavior Register is set, CFAULT will be

asserted if an analog input crosses the corresponding AIN low

limit, the direction depending on the setting of Bit 3 of the

AIN Behavior Register. (0 = CFAULT when input goes

below low limit, 1 = CFAULT when input goes above low limit).

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