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STW4811MBRA/LF 数据表(PDF) 57 Page - STMicroelectronics |
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STW4811MBRA/LF 数据表(HTML) 57 Page - STMicroelectronics |
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57 / 85 page ![]() STw4811M/STw4811N Electrical and timing characteristics CD00131784 57/85 Note: The configuration Vxxx_SLEEP = 0 (device in active mode) and Vxxx_FORCE_SLEEP = 1 (device in sleep mode, but no priority level on this bit) is forbidden. In all the following tables: – “High power mode” is defined as “SLEEP = ‘0’” – “Sleep mode” is defined as “SLEEP = ‘1’” Use Table 27 to refer to each Vxxx supply (VCORE or VIO_VMEM or VAUX). 5.3.1 Operating conditions 5.3.2 VREF18 Table 37. Operating conditions (temperature range: -30 to +85 °C) Symbol Description Test conditions Min. Typ. Max. Units VBAT Power supply 2.7 4.8 V IQSLEEP Quiescent current Sleep mode VBAT = 3.6 V 140 µA IQSTDBY OFF mode VBAT = 3.6 V 4µA Table 38. VREF18 Symbol Description Test conditions Min. Typ. Max. Units VBAT Supply voltage 2.7 4.8 V VREF_18 Output voltage 1.78 1.8 1.84 V PSRR Power supply rejection ratio Vpp = 0.3 V f ≤ 100 kHz 60 dB Noise 100 Hz ≤ f ≤ 100 kHz 30 µV tS Settling time 7.77 9.46 ms |
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