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STW4811MBRA/LF 数据表(PDF) 65 Page - STMicroelectronics |
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STW4811MBRA/LF 数据表(HTML) 65 Page - STMicroelectronics |
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65 / 85 page  STw4811M/STw4811N Electrical and timing characteristics CD00131784 65/85 5.4.2 CMOS input/output dynamic characteristics: I2C interface Table 46. CMOS input/output dynamic characteristics: I²C interface Symbol Description Min. Typ. Max. Units I²C interface ( Figure 8) Fscl Clock frequency 400 kHz thigh Clock pulse width high 600 ns tlow Clock pulse width low 1300 ns tr SDA, SCL, USBSDA, USBSCL rise time 20+0.1*Cb (1) 1. Cb = total capacitance of one bus line in pF 300 ns tf SDA, SCL, USBSDA, USBSCL fall time 20+0.1*Cb 300 ns thd_sta Start condition hold time 600 ns tsu_sta Start condition set up time 600 ns thd_dat Data input hold time 0 ns tsu_dat Data input set up time 100 ns tsu_sto Stop condition set up time 600 ns tbuf Bus free time 1300 ns Cb Capacitive load for each bus line 400 pF |
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