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STW4811MBRA/LF 数据表(PDF) 63 Page - STMicroelectronics

部件名 STW4811MBRA/LF
功能描述  Power management for multimedia processors
PDF  85 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW4811MBRA/LF 数据表(HTML) 63 Page - STMicroelectronics

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STw4811M/STw4811N
Electrical and timing characteristics
CD00131784
63/85
ILKG
Power-down
current
’pdn_vaux’ = 0
1
µA
PSRR(1)
Power supply
rejection
VOUT=1.5 V
Vpp = 0.3 V
f < 10 kHz
40
dB
LIR
Line regulation
VOUT=1.5 V
VBAT: [2.7; 4.8]V
5mV
LDR
(1)
Load regulation
VOUT=1.5 V
IOUT= [0.1; 150] mA
10
mV
LIRT
Transient line
regulation
ΔVBAT = 300 mV
tR = tF = 10 µs
2mV
LDRT
Transient load
regulation
IOUT = [10; 90%]
mA
tR = tF = 1 µs
35
mV
tS
Settling time
100
µs
VAUX regulator in sleep mode (’pdn_vaux’= 1, SLEEP=’1’)
VBAT
Input power supply
VOUT = 1.5V
VIO_VMEM supply
1.7
4.8
V
VOUT = 1.8/2.5 V
2.7
3.6
4.8
V
VOUT = 2.8 V
3
3.6
4.8
IOUT
Output current
500
µA
IQ
Quiescent current
IOUT = 0 mA
20
µA
PSRR(1)
Power supply
rejection
VOUT=1.5 V
Vpp = 0.3 V
f < 10 kHz
38
dB
LIR
Line regulation
VOUT=1.5 V
VBAT: [2.7; 4.8]V
5mV
LDR
Load regulation
VOUT=1.5 V
IOUT= [10; 90%] µA
10
mV
LIRT
Transient line
regulation
ΔVBAT = 300 mV
tR = tF = 10 µs
2mV
LDRT
Transient load
regulation
IOUT = [10; 90%] µA
tR = tF = 1 µs
35
mV
1.
Guaranteed by design
Table 43.
LDO regulators - VAUX (continued)
Symbol
Description
Test conditions
Min.
Typ.
Max.
Units



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