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STW4811MBRA/LF 数据表(PDF) 64 Page - STMicroelectronics

部件名 STW4811MBRA/LF
功能描述  Power management for multimedia processors
PDF  85 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW4811MBRA/LF 数据表(HTML) 64 Page - STMicroelectronics

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Electrical and timing characteristics
STw4811M/STw4811N
64/85
CD00131784
5.3.6
Power supply monitoring
This block monitors the VCORE and VIO_VMEM output voltage. If VCORE or VIO_VMEM
drops below the threshold, the multimedia processor is reset.
5.4
Digital specifications
5.4.1
CMOS input/output static characteristics: I2C interface
Table 44.
Power supply monitoring
Symbol
Description
Test conditions
Min.
Typ.
Max.
Units
Threshold
THCORE
(1)
1.
Guaranteed by design
Threshold VCORE
-3%
VCORE-150
+3%
mV
THVIO
(1)
Threshold
VIO_VMEM
-3%
1.65
+3%
V
Comparators
VBAT
Supply voltage
2.7
3.6
4.8
V
tRES
Response time
100
ns
HYFALL
Hysteresis (input
voltage falling)
26
mV
HYRIS
Hysteresis (input
voltage rising)
+4
mV
Table 45.
CMOS input/output static characteristics: I²C interface
Symbol
Description
Test conditions
Min.
Typ.
Max.
Units
I²C interface(1)
1.
Vio is for VIO_VMEM
VIL
Low level input
voltage
0.3*VIO
V
VIH
High level input
voltage
0.7*VIO
V
IIL
Low level input
current
-1.0
1.0
µA
IIH
High level input
current
-1.0
1.0
µA
VOL
Low level output
voltage
IOL = 3mA
(with open drain or
open collector)
0.2*VIO
V
VOH
High level output
voltage
IOL = 3mA
(with open drain or
open collector)
0.8*VIO
V



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