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HT68FU50 数据表(PDF) 106 Page - Holtek Semiconductor Inc |
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HT68FU50 数据表(HTML) 106 Page - Holtek Semiconductor Inc |
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106 / 244 page  HT68F20/HT68F30/HT68F40/HT68F50/HT68F60 HT68FU30/HT68FU40/HT68FU50/HT68FU60 Rev. 1.50 106 March 15, 2011 This is the output control bit for the TM output pin. Its operation depends upon whether TM is being used in the Compare Match Output Mode or in the PWM Mode/ Single Pulse Output Mode. It has no effect if the TM is in the Timer/Counter Mode. In the Compare Match Output Mode it determines the logic level of the TM output pin before a compare match occurs. In the PWM Mode it determines if the PWM signal is active high or active low. Bit 2 T2POL: TP2_0, TP2_1 Output polarity Control 0: Non-invert 1: Invert This bit controls the polarity of the TP2_0 or TP2_1 output pin. When the bit is set high the TM output pin will be inverted and not inverted when the bit is zero. It has no effect if the TM is in the Timer/Counter Mode. Bit 1 T2DPX: TM2 PWM period/duty Control 0: CCRP - period; CCRA - duty 1: CCRP - duty; CCRA - period This bit, determines which of the CCRA and CCRP registers are used for period and duty control of the PWM waveform. Bit 0 T2CCLR: Select TM2 Counter clear condition 0: TM2 Comparator P match 1: TM2 Comparator A match This bit is used to select the method which clears the counter. Remember that the Standard TM contains two comparators, Comparator A and Comparator P, either of which can be selected to clear the internal counter. With the T2CCLR bit set high, the counter will be cleared when a compare match occurs from the Comparator A. When the bit is low, the counter will be cleared when a compare match occurs from the Comparator P or with a counter overflow. A counter overflow clearing method can only be implemented if the CCRP bits are all cleared to zero. The T1CCLR bit is not used in the PWM, Single Pulse or Input Capture Mode. ¨ TM2DL Register - 16-bit STM Bit 76543210 Name D7 D6 D5 D4 D3 D2 D1 D0 R/W RRRRRRRR POR 00000000 Bit 7~0 TM2DL: TM2 Counter Low Byte Register bit 7~bit 0 TM2 16-bit Counter bit 7~bit 0 ¨ TM2DH Register - 16-bit STM Bit 76543210 Name D15 D14 D13 D12 D11 D10 D9 D8 R/W RRRRRRRR POR 00000000 Bit 7~0 TM2DH: TM2 Counter High Byte Register bit 7~bit 0 TM2 16-bit Counter bit 15~bit 8 ¨ TM2AL Register - 16-bit STM Bit 76543210 Name D7 D6 D5 D4 D3 D2 D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 00000000 Bit 7~0 TM2AL: TM2 CCRA Low Byte Register bit 7~bit 0 TM2 16-bit CCRA bit 7~bit 0 |
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