AFS090 datasheet(192/334 Pages) MICROSEMI

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Device Architecture

2- 17 6

R e v isio n 2

Table 2-99 • Short Current Event Duration before Failure

Temperature

Time before Failure

–40°C

>20 years

0°C

>20 years

25°C

>20 years

70°C

5 years

85°C

2 years

100°C

6 months

Table 2-100 • Schmitt Trigger Input Hysteresis

Hysteresis Voltage Value (typ.) for Schmitt Mode Input Buffers

Input Buffer Configuration

Hysteresis Value (typ.)

3.3 V LVTTL/LVCMOS/PCI/PCI-X (Schmitt trigger mode)

240 mV

2.5 V LVCMOS (Schmitt trigger mode)

140 mV

1.8 V LVCMOS (Schmitt trigger mode)

80 mV

1.5 V LVCMOS (Schmitt trigger mode)

60 mV

Table 2-101 • I/O Input Rise Time, Fall Time, and Related I/O Reliability

Input Buffer

Input Rise/Fall Time (min.)

Input Rise/Fall Time (max.)

Reliability

LVTTL/LVCMOS (Schmitt trigger

disabled)

No requirement

10 ns*

20 years (100°C)

LVTTL/LVCMOS (Schmitt trigger

enabled)

No requirement

No requirement, but input

noise voltage cannot exceed

Schmitt hysteresis

20 years (100°C)

HSTL/SSTL/GTL

No requirement

10 ns*

10 years (100°C)

LVDS/BLVDS/M-LVDS/LVPECL

No requirement

10 ns*

10 years (100°C)

Note:

*The maximum input rise/fall time is related only to the noise induced into the input buffer trace. If the noise is

low, the rise time and fall time of input buffers, when Schmitt trigger is disabled, can be increased beyond the

maximum value. The longer the rise/fall times, the more susceptible the input signal is to the board noise.

Microsemi recommends signal integrity evaluation/characterization of the system to ensure there is no excessive

noise coupling into input signals.

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