AS1160 datasheet(1/29 Pages) AMSCO

部件名	AS1160

功能描述	20MHz - 66MHz, 10-Bit Bus, IEEE 1149.1 (JTAG) Compliant LVDS Serializer/Deserializer

PDF	29 Pages

Scroll/Zoom	100%

制造商	AMSCO [ams AG]

网页	http://www.ams.com

标志

1 / 29 page

AS1160/AS1161

20MHz - 66MHz, 10-Bit Bus, IEEE 1149.1 (JTAG)

Compliant LV DS Serializer/Deserializer

www.austriamicrosystems.com/Interfaces-LVDS/AS1160_61

Revision 1.01

1 - 29

Data sheet

1 General Description

The AS1160 (serializer) is designed to convert 10-bit

wide parallel LVCMOS/LVTTL data bus signals into a

single high-speed LVDS serial data stream with clock.

The AS1161 (deserializer) transforms the high-speed

LVDS serial data stream back into a 10-bit wide parallel

data bus with recovered parallel clock.

Both devices are compliant with IEEE 1149.1 Standard

Test Access Port and Boundary Scan Architecture

(including the defined boundary-scan test logic and test

access port consisting of Test Data Input, Test Data Out,

and Test Mode Select, Test Clock, and Test Reset).

The devices also feature an at-speed BIST mode which

allows the interconnects between the serializer and

deserializer to be verified at-speed.

The single differential-pair data-path makes PCB design

easier, and reduced cable/PCB-trace count and connec-

tor size significantly reduce cost. Since one output trans-

mits clock and data bits serially, clock-to-data and data-

to-data skew are eliminated.

Powerdown mode reduces supply current when both

devices are idle.

Both devices are available in a CTBGA 49-bumps pin

package.

Figure 1. Block Diagrams

2 Key Features

!

Serial Bus LVDS Data Rate: 660 Mbps @ 66MHz

Clock

!

10-bit Parallel Interface

!

Synchronization Mode and Lock Indicator

!

Programmable Edge Trigger on Clock

!

High Impedance on Rx Inputs during Poweroff

!

Bus LVDS Serial Output Load: 28

Ω

!

IEEE 1149.1 (JTAG) Compliant and At-Speed BIST

Test Mode

!

Clock Recovery from PLL Lock to Random Data

Patterns

!

Guaranteed Transition each Data Transfer Cycle

!

Chipset (Tx + Rx) Power Consumption: < 500 mW

@ 66MHz

!

Single Differential-Pair eliminates Multi-Channel

Skew

!

Flow-Through Pinout for Simple PCB Layout

!

Small CTBGA 49-bumps Package

3 Applications

The devices are ideal for cellular phone base stations,

add drop muxes, digital cross-connects. DSLAMs, net-

workswitches and routers or backplane interconnect.

AS1160

DO+

DO-

TCLK

TCKR/FN

Input

Latch

PLL

DIN0:9

Parallel-

to-Serial

10

Timing &

Control

DEN

SYNC1

SYNC2

TDI

TDO

TCK

TMS

IEEE 1149.1

Test Access

Port

TRSTN

AS1161

RI+

RI-

Output

Latch

PLL

ROUT0:9

Parallel-

to-Serial

10

Timing &

Control

REFCLK

REN

LOCKN

RCLK

Clock

Recovery

RCKR/FN

LVDS

TDI

TDO

TCK

TMS

IEEE 1149.1

Test Access

Port

TRSTN

类似零件编号 - AS1160

制造商	部件名	数据表	功能描述
Sumida Corporation	AS11619	200Kb / 2P	LF Transmitter Antenna
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	AS11619-125B	200Kb / 2P	LF Transmitter Antenna
	AS11619-125C	200Kb / 2P	LF Transmitter Antenna
	AS11619-125D	200Kb / 2P	LF Transmitter Antenna

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类似说明 - AS1160

制造商	部件名	数据表	功能描述
National Semiconductor ...	DS92LV1021	382Kb / 18P	16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer
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Texas Instruments	SN65LV1023	292Kb / 20P	30 MHZ TO 66MHZ 10:1 LVDS SERIALIZER/DESERIALIZER
National Semiconductor ...	SCAN921260	379Kb / 16P	X6 1:10 Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST
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Texas Instruments	DS92LV1021	1Mb / 23P	16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer
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